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FMC ADC 100M 14b 4cha - Software
Commit ba51bcfd authored by Federico Vaga's avatar Federico Vaga
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core:trivial: all code within 80 columns 

Signed-off-by: 's avatarFederico Vaga <federico.vaga@gmail.com>
parent 86fccc41
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Showing with 42 additions and 26 deletions
kernel/fa-dma.c
View file @ ba51bcfd
......@@ -51,7 +51,8 @@ static int zfat_calculate_nents(struct zio_block *block)
*
* Initialize each element of the scatter list
*/
static void zfad_setup_dma_scatter(struct fa_dev *fa, struct zfad_block *zfad_block)
static void zfad_setup_dma_scatter(struct fa_dev *fa,
struct zfad_block *zfad_block)
{
struct scatterlist *sg;
int bytesleft = zfad_block->block->datalen;
......@@ -82,7 +83,8 @@ static void zfad_setup_dma_scatter(struct fa_dev *fa, struct zfad_block *zfad_bl
bufp += mapbytes;
bytesleft -= mapbytes;
pr_debug("sg item (%p(+0x%lx), len:%d, left:%d)\n",
virt_to_page(bufp), offset_in_page(bufp), mapbytes, bytesleft);
virt_to_page(bufp), offset_in_page(bufp),
mapbytes, bytesleft);
}
WARN(bytesleft, "Something Wrong");
......@@ -139,8 +141,8 @@ int zfad_map_dma(struct zio_cset *cset, struct zfad_block *zfad_block)
/* Setup the scatter list for the provided block */
zfad_setup_dma_scatter(fa, zfad_block);
/* Map DMA buffers */
sglen = dma_map_sg(fa->fmc->hwdev, zfad_block->sgt.sgl, zfad_block->sgt.nents,
DMA_FROM_DEVICE);
sglen = dma_map_sg(fa->fmc->hwdev, zfad_block->sgt.sgl,
zfad_block->sgt.nents, DMA_FROM_DEVICE);
if (!sglen) {
dev_err(fa->fmc->hwdev, "cannot map dma memory\n");
goto out_map;
......
kernel/fa-zio-drv.c
View file @ ba51bcfd
......@@ -165,17 +165,26 @@ static struct zio_attribute zfad_cset_ext_zattr[] = {
* */
ZIO_PARAM_EXT("fsm-state", ZIO_RO_PERM, ZFA_STA_FSM, 0),
/* last acquisition start time stamp */
ZIO_PARAM_EXT("tstamp-acq-str-s", ZIO_RO_PERM, ZFA_UTC_ACQ_START_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-str-t", ZIO_RO_PERM, ZFA_UTC_ACQ_START_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-str-b", ZIO_RO_PERM, ZFA_UTC_ACQ_START_FINE, 0),
ZIO_PARAM_EXT("tstamp-acq-str-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-str-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-str-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_START_FINE, 0),
/* last acquisition end time stamp */
ZIO_PARAM_EXT("tstamp-acq-end-s", ZIO_RO_PERM, ZFA_UTC_ACQ_END_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-end-t", ZIO_RO_PERM, ZFA_UTC_ACQ_END_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-end-b", ZIO_RO_PERM, ZFA_UTC_ACQ_END_FINE, 0),
ZIO_PARAM_EXT("tstamp-acq-end-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-end-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-end-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_END_FINE, 0),
/* last acquisition stop time stamp */
ZIO_PARAM_EXT("tstamp-acq-stp-s", ZIO_RO_PERM, ZFA_UTC_ACQ_STOP_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-t", ZIO_RO_PERM, ZFA_UTC_ACQ_STOP_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-b", ZIO_RO_PERM, ZFA_UTC_ACQ_STOP_FINE, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-s", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_SECONDS, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-t", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_COARSE, 0),
ZIO_PARAM_EXT("tstamp-acq-stp-b", ZIO_RO_PERM,
ZFA_UTC_ACQ_STOP_FINE, 0),
/* Reset all channel offset */
ZIO_PARAM_EXT("rst-ch-offset", ZIO_WO_PERM, ZFA_CTL_DAC_CLR_N, 1),
......@@ -381,7 +390,7 @@ static int zfad_apply_user_offset(struct fa_dev *fa, struct zio_channel *chan,
gain = fa->dac_cal_data[range].gain[chan->index];
/* Calculate calibrater value for DAC */
cal_val = (((((usr_val - 0x8000 + offset) << 15) * gain) >> 30));
cal_val = ((((usr_val - 0x8000 + offset) << 15) * gain) >> 30);
cal_val += 0x8000;
} else { /* Open range */
cal_val = usr_val;
......@@ -390,7 +399,7 @@ static int zfad_apply_user_offset(struct fa_dev *fa, struct zio_channel *chan,
if (cal_val > 0xFFFF)
cal_val = 0xFFFF;
dev_dbg(&chan->head.dev, "DAC offset calibration value 0x%x\n", cal_val);
dev_dbg(&chan->head.dev, "DAC offset calibration 0x%x\n", cal_val);
/* Apply calibrated offset to DAC */
return fa_spi_xfer(fa, chan->index, 16, cal_val, &tmp);
}
......@@ -422,7 +431,8 @@ static int zfad_conf_set(struct device *dev, struct zio_attribute *zattr,
i--;
case ZFA_CH4_OFFSET:
i--;
err = zfad_apply_user_offset(fa, &to_zio_cset(dev)->chan[i], usr_val);
err = zfad_apply_user_offset(fa, &to_zio_cset(dev)->chan[i],
usr_val);
if (err)
return err;
return 0;
......
kernel/fa-zio-trg.c
View file @ ba51bcfd
......@@ -266,7 +266,7 @@ static int zfat_arm_trigger(struct zio_ti *ti)
dev_dbg(&ti->head.dev, "programmed shot %i\n", fa->n_shots);
if (!fa->n_shots) {
dev_err(&ti->head.dev, "Cannot arm trigger.No programmed shots\n");
dev_err(&ti->head.dev, "Cannot arm. No programmed shots\n");
return -EINVAL;
}
......
kernel/fmc-adc.h
View file @ ba51bcfd
......@@ -297,8 +297,10 @@ static inline int zfat_overflow_detection(struct zio_ti *ti, unsigned int addr,
if (!addr)
return 0;
pre_t = addr == ZFAT_PRE ? val : ti_zattr[ZIO_ATTR_TRIG_PRE_SAMP].value;
post_t = addr == ZFAT_POST ? val : ti_zattr[ZIO_ATTR_TRIG_POST_SAMP].value;
pre_t = addr == ZFAT_PRE ? val :
ti_zattr[ZIO_ATTR_TRIG_PRE_SAMP].value;
post_t = addr == ZFAT_POST ? val :
ti_zattr[ZIO_ATTR_TRIG_POST_SAMP].value;
if (ti->cset->trig != &zfat_type)
nshot_t = 1; /* with any other trigger work in one-shot mode */
else
......@@ -308,7 +310,7 @@ static inline int zfat_overflow_detection(struct zio_ti *ti, unsigned int addr,
size = ((pre_t + post_t) * ti->cset->ssize * nshot_t) *
(ti->cset->n_chan - 1);
if (size >= FA_MAX_ACQ_BYTE) {
dev_err(&ti->head.dev, "cannot acquire, device memory overflow\n");
dev_err(&ti->head.dev, "Cannot acquire, dev memory overflow\n");
return -ENOMEM;
}
return 0;
......
kernel/spi.c
View file @ ba51bcfd
......@@ -23,6 +23,8 @@
#define FA_SPI_DIV 0x14
#define FA_SPI_CS 0x18
#define FA_SPI_REG(_off) (FA_SPI_MEM_OFF + _off)
/* SPI control register fields mask */
#define FA_SPI_CTRL_BUF 0x007F
#define FA_SPI_CTRL_BUSY 0x0100
......@@ -45,14 +47,14 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits,
/* Configure SPI controller */
ctrl |= FA_SPI_CTRL_ASS | /* Automatic handle ChipSelect*/
num_bits; /* Transfer num_bits bits */
fmc_writel(fa->fmc, ctrl, FA_SPI_MEM_OFF + FA_SPI_CTRL);
fmc_writel(fa->fmc, ctrl, FA_SPI_REG(FA_SPI_CTRL));
/* Set Chip Select */
fmc_writel(fa->fmc, (1 << cs), FA_SPI_MEM_OFF + FA_SPI_CTRL_ASS);
fmc_writel(fa->fmc, (1 << cs), FA_SPI_REG(FA_SPI_CTRL_ASS));
/* Start transfer */
ctrl |= FA_SPI_CTRL_BUSY;
fmc_writel(fa->fmc, ctrl, FA_SPI_MEM_OFF + FA_SPI_CTRL);
fmc_writel(fa->fmc, ctrl, FA_SPI_REG(FA_SPI_CTRL));
/* Wait transfer complete */
while(fmc_readl(fa->fmc, FA_SPI_MEM_OFF + FA_SPI_CTRL) & FA_SPI_CTRL_BUSY) {
while(fmc_readl(fa->fmc, FA_SPI_REG(FA_SPI_CTRL)) & FA_SPI_CTRL_BUSY) {
if (jiffies > j) {
dev_err(&fa->fmc->dev, "SPI transfer error\n");
err = -EIO;
......@@ -60,12 +62,12 @@ int fa_spi_xfer(struct fa_dev *fa, int cs, int num_bits,
}
}
/* Transfer compleate, read data */
*rx = fmc_readl(fa->fmc, FA_SPI_MEM_OFF + FA_SPI_RX(0)) & (num_bits-1);
*rx = fmc_readl(fa->fmc, FA_SPI_REG(FA_SPI_RX(0))) & (num_bits-1);
dev_dbg(&fa->fmc->dev, "SPI transfer CS %d, NBIT %d, TX 0x%x RX 0x%x\n",
cs, num_bits, tx, *rx);
out:
/* Clear Chip Select */
fmc_writel(fa->fmc, 0, FA_SPI_MEM_OFF + FA_SPI_CTRL_ASS);
fmc_writel(fa->fmc, 0, FA_SPI_REG(FA_SPI_CTRL_ASS));
return err;
}
......
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