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FMC ADC 100M 14b 4cha - Testing
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FMC ADC 100M 14b 4cha - Testing
Commits
fd5caa0a
Commit
fd5caa0a
authored
Jan 08, 2014
by
Matthieu Cattin
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svec_test34: Change test name, add warning message.
parent
45e0769d
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-2
svec_test34.py
test/fmcadc100m14b4cha/python/svec_test34.py
+4
-2
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test/fmcadc100m14b4cha/python/svec_test
02
.py
→
test/fmcadc100m14b4cha/python/svec_test
34
.py
View file @
fd5caa0a
...
...
@@ -26,7 +26,7 @@ from fmc_adc import *
"""
test
02
: Test interrupts
test
34
: Test interrupts
Requires the interrupt timeout to be extended to 5000ms using vmeiotest
Requires a pps pulse on trigger inputs.
"""
...
...
@@ -35,7 +35,7 @@ def main (default_directory='.'):
# Constants declaration
LUN
=
0
TEST_NB
=
2
TEST_NB
=
34
FMC_ADC_BITSTREAM
=
'../../../../../firmwares/svec_fmcadc100m14b4cha.bin'
FMC_ADC_BITSTREAM
=
os
.
path
.
join
(
default_directory
,
FMC_ADC_BITSTREAM
)
EXPECTED_BITSTREAM_TYPE
=
0x0
...
...
@@ -49,6 +49,8 @@ def main (default_directory='.'):
print
"
\n
================================================================================"
print
"==> [SVEC] Test
%02
d start
\n
"
%
TEST_NB
print
(
"WARNING: interrupt timeout must be extended to 5000ms using vmeiotest!"
)
# SVEC object declaration
print
"Loading hardware access library and opening device.
\n
"
bus
=
VME_rr_compatible
(
LUN
)
...
...
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