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FMC DEL 1ns 2cha
Commit 01d4ddcf authored by Tom Levens's avatar Tom Levens
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Add constraints for SPEC LEDs 

- Front-panel "link" and "act" LEDs are not included in the base design
  constraints unless WR is enabled.
- Constraints for the "aux" LEDs are missing, see:
    https://gitlab.cern.ch/be-cem-edl/fec/hardware-modules/spec/-/issues/15

Also switch to the "link" (green) LED for bus activity.
parent bcde5365
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Showing with 17 additions and 2 deletions
hdl/syn/spec/spec_top_ffpg.ucf
View file @ 01d4ddcf
......@@ -176,6 +176,21 @@ NET "Fmc0SpiAd9512Cs_on" IOSTANDARD = "LVCMOS25";
# NET "fmc0_trst" LOC = E6;
# NET "fmc0_trst" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# LEDs not included in base UCF
#----------------------------------------
NET "led_act_o" LOC = D5;
NET "led_act_o" IOSTANDARD = "LVCMOS25";
NET "led_link_o" LOC = E5;
NET "led_link_o" IOSTANDARD = "LVCMOS25";
NET "aux_leds_o[0]" LOC = G19;
NET "aux_leds_o[1]" LOC = F20;
NET "aux_leds_o[2]" LOC = F18;
NET "aux_leds_o[3]" LOC = C20;
NET "aux_leds_o[*]" IOSTANDARD = "LVCMOS18";
#===============================================================================
# Timing constraints
#===============================================================================
......
hdl/top/spec/spec_top_ffpg.vhd
View file @ 01d4ddcf
......@@ -368,10 +368,10 @@ begin
clk_i => clk_sys_62m5,
rst_n_i => rst_sys_62m5_n,
pulse_i => master_wb_out.stb,
extended_o => led_act_o
extended_o => led_link_o
);
led_link_o <= '0';
led_act_o <= '0';
aux_leds_o <= "0000";
-----------------------------------------------------------------------------
......
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