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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
1c399c91
Commit
1c399c91
authored
Dec 14, 2012
by
Tomasz Wlostowski
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hdl/rtl/fd_main_wishbone_slave.vhd: I2C outputs should be set to ones upon reset
parent
7f430c0e
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3 changed files
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4 additions
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2 deletions
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fd_main_wbgen2_pkg.vhd
hdl/rtl/fd_main_wbgen2_pkg.vhd
+1
-1
fd_main_wishbone_slave.vhd
hdl/rtl/fd_main_wishbone_slave.vhd
+1
-1
fd_main_wishbone_slave.wb
hdl/rtl/fd_main_wishbone_slave.wb
+2
-0
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hdl/rtl/fd_main_wbgen2_pkg.vhd
View file @
1c399c91
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@@ -3,7 +3,7 @@
---------------------------------------------------------------------------------------
-- File : fd_main_wbgen2_pkg.vhd
-- Author : auto-generated by wbgen2 from fd_main_wishbone_slave.wb
-- Created :
Mon Jun 4 13:42:20
2012
-- Created :
Fri Dec 14 11:28:02
2012
-- Standard : VHDL'87
---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fd_main_wishbone_slave.wb
...
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hdl/rtl/fd_main_wishbone_slave.vhd
View file @
1c399c91
...
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@@ -3,7 +3,7 @@
---------------------------------------------------------------------------------------
-- File : fd_main_wishbone_slave.vhd
-- Author : auto-generated by wbgen2 from fd_main_wishbone_slave.wb
-- Created :
Wed Oct 24 15:07:30
2012
-- Created :
Fri Dec 14 11:28:02
2012
-- Standard : VHDL'87
---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE fd_main_wishbone_slave.wb
...
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hdl/rtl/fd_main_wishbone_slave.wb
View file @
1c399c91
...
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@@ -849,6 +849,7 @@ write 0: DMTD pattern generation disabled.";
name = "SCL Line out";
prefix = "SCL_OUT";
type = BIT;
reset_value = 1;
access_bus = READ_WRITE;
access_dev = READ_ONLY;
};
...
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@@ -856,6 +857,7 @@ write 0: DMTD pattern generation disabled.";
name = "SDA Line out";
prefix = "SDA_OUT";
type = BIT;
reset_value = 1;
access_bus = READ_WRITE;
access_dev = READ_ONLY;
};
...
...
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