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FMC DEL 1ns 4cha
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FMC DEL 1ns 4cha
Commits
4312ed60
Commit
4312ed60
authored
May 19, 2020
by
Federico Vaga
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doc: generate png image from eps
Signed-off-by:
Federico Vaga
<
federico.vaga@cern.ch
>
parent
95332c0c
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4 changed files
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Makefile
doc/software/Makefile
+1
-0
.gitignore
doc/software/drawings/.gitignore
+1
-0
Makefile
doc/software/drawings/Makefile
+13
-0
introduction.rst
doc/software/introduction.rst
+4
-4
No files found.
doc/software/Makefile
View file @
4312ed60
...
...
@@ -17,4 +17,5 @@ help:
# Catch-all target: route all unknown targets to Sphinx using the new
# "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS).
%
:
Makefile
$(MAKE)
-C
drawings
@
$(SPHINXBUILD)
-M
$@
"
$(SOURCEDIR)
"
"
$(BUILDDIR)
"
$(SPHINXOPTS)
$(O)
doc/software/drawings/.gitignore
0 → 100644
View file @
4312ed60
*.png
\ No newline at end of file
doc/software/drawings/Makefile
0 → 100644
View file @
4312ed60
EPSIMAGES
:=
$(
shell
ls
*
eps
)
all
:
images
clean
:
@
rm
$
(
EPSIMAGES:.eps
=
.png
)
images
:
$(EPSIMAGES:.eps=.png)
%.png
:
%.eps
@
convert
$<
$@
.PHONY
:
all clean images
doc/software/introduction.rst
View file @
4312ed60
...
...
@@ -84,7 +84,7 @@ Modes of Operation
* **Time to Digital Converter**: tags all trigger pulses and delivers the
timestamps to the user's application.
.. image:: drawings/func.
eps
.. image:: drawings/func.
png
:alt: *fine-delay* operating modes.
Modes (pulse delay/generator) can be selected independently for each output.
...
...
@@ -96,7 +96,7 @@ does not interfere with the operation of the channels being time tagged.
Mechanical/Environmental
========================
.. image:: drawings/front_panels.
eps
.. image:: drawings/front_panels.
png
:alt: *fine-delay* front panel connector layout.
**Mechanical and environmental specs:**
...
...
@@ -145,7 +145,7 @@ Electrical
Timing
======
.. image:: drawings/io_timing.
eps
.. image:: drawings/io_timing.
png
:alt: *fine-delay* timing parameter definitions.
**Time base:**
...
...
@@ -199,7 +199,7 @@ Principles of Operation
if you are an electronics engineer, you can skip this section, as
you will most likely find it rather boring.
.. image:: drawings/analog_digital_delays.
eps
.. image:: drawings/analog_digital_delays.
png
:alt: Principle of operation of analog and digital delay generators.
Contrary to typical analog delay cards, which work by comparing an analog ramp
...
...
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