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AIDA-2020 TLU
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AIDA-2020 TLU
Commits
86086693
Commit
86086693
authored
Oct 09, 2014
by
David Cussans
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Comitting minor changes to ADosil branch before reintegrating branch back to trunk
parent
cd1b1bc7
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4 changed files
with
10 additions
and
2 deletions
+10
-2
setup_project.tcl
firmware/config/ise14/sp601/setup_project.tcl
+1
-0
setup_project.tcl
firmware/config/ise14/sp605/setup_project.tcl
+6
-0
top_extphy_struct.vhd
..._designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
+2
-1
setup_workspace.sh
firmware/scripts/setup_workspace.sh
+1
-1
No files found.
firmware/config/ise14/sp601/setup_project.tcl
View file @
86086693
...
...
@@ -70,6 +70,7 @@ xfile add ipbus/firmware/example_designs/hdl/clock_div.vhd
xfile add ipbus/firmware/slaves/hdl/ipbus_reg_types.vhd
xfile add ipbus/firmware/slaves/hdl/ipbus_reg_v.vhd
xfile add ipbus/firmware/slaves/hdl/ipbus_ctrlreg_v.vhd
#xfile add ipbus/firmware/slaves/hdl/syncreg_r.vhd
#xfile add ipbus/firmware/slaves/hdl/syncreg_w.vhd
#xfile add ipbus/firmware/slaves/hdl/ipbus_syncreg_v.vhd
...
...
firmware/config/ise14/sp605/setup_project.tcl
View file @
86086693
...
...
@@ -9,6 +9,7 @@ project set "Pack I/O Registers/Latches into IOBs" "For Inputs and Outputs" -pro
project set
"Enable Multi-Threading"
"2"
-process
"Place & Route"
project set
"Enable BitStream Compression"
TRUE -process
"Generate Programming File"
project set
"Preferred Language"
"VHDL"
project set
"Set SPI Configuration Bus Width spartan6"
4
# source $::env(REPOS_FW_DIR
)
/firmware/example_designs/scripts/addfiles.tcl
...
...
@@ -73,6 +74,7 @@ xfile add ipbus/firmware/slaves/hdl/ipbus_reg_types.vhd
#xfile add ipbus/firmware/slaves/hdl/syncreg_w.vhd
#xfile add ipbus/firmware/slaves/hdl/ipbus_syncreg_v.vhd
xfile add ipbus/firmware/slaves/hdl/ipbus_ctrlreg_v.vhd
xfile add ipbus/firmware/slaves/hdl/ipbus_ctrlreg_v.vhd
# Add Opencores files for i2c interface
xfile add external/opencores_i2c/i2c_master_bit_ctrl.vhd
...
...
@@ -130,6 +132,10 @@ xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/TPx3Logic_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/TPx3Logic_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/pulseClockDomainCrossing_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
# Then add the HDL-Designer generated files..
...
...
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
View file @
86086693
...
...
@@ -514,7 +514,8 @@ BEGIN
trigger_i
=>
overall_trigger
,
trigger_times_i
=>
postVeto_trigger_times
,
trigger_inputs_fired_i
=>
postVeto_triggers
,
trigger_cnt_i
=>
trigger_cnt_i
,
-- trigger_cnt_i => trigger_cnt_i,
trigger_cnt_i
=>
event_number_o
,
shutter_i
=>
shutter_i
,
shutter_cnt_i
=>
shutter_cnt_i
,
spill_i
=>
spill_i
,
...
...
firmware/scripts/setup_workspace.sh
View file @
86086693
...
...
@@ -36,7 +36,7 @@ IPBusDir=`pwd`/IPBus2
if
[
!
-d
"
$IPBusDir
"
]
;
then
mkdir
$IPBusDir
pushd
$IPBusDir
svn co http://svn.cern.ch/guest/cactus/tags/ipbus_2_0_v1/firmware
svn co http://svn.cern.ch/guest/cactus/tags/ipbus_
fw/ipbus_
2_0_v1/firmware
echo
"Checked out IPBus2 code"
popd
fi
...
...
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