minor bug fixed in the TPx3 handshake

9a12eaf6 · Alvaro Dosil · 030b71ff · 9a12eaf6
Commit 9a12eaf6 authored Jul 22, 2014 by Alvaro Dosil
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Showing with 17 additions and 9 deletions

TPx3Logic_rtl.vhd firmware/hdl/common/TPx3Logic_rtl.vhd +17 -9

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--- a/firmware/hdl/common/TPx3Logic_rtl.vhd
+++ b/firmware/hdl/common/TPx3Logic_rtl.vhd
@@ -72,8 +72,8 @@ ARCHITECTURE rtl OF TPx3Logic IS
 	type state_values is (st0, st1);
 	signal pres_state, next_state: state_values;

-	signal s_Enable, s_Veto : std_logic := '0';
-	signal s_Shutter, s_Shutter_old, s_T0sync : std_logic := '0';
+	signal s_Enable : std_logic := '0';
+	signal s_Shutter, s_Shutter_d1f, s_Shutter_d1, s_T0sync, s_T0sync_d1f : std_logic := '0';
 	signal s_Start_T0sync, s_Start_T0sync_d1, s_Start_T0sync_d2, s_Start_T0sync_d3 : std_logic;
 	signal Rst_T0sync, T0syncT : 		std_logic;   	--Load signal and flag for the T0sync
 	signal s_RunNumber : unsigned(g_IPBUS_WIDTH-1 downto 0) := (others => '0');  -- ! counters for runs
@@ -114,8 +114,7 @@ BEGIN
 	-----------------------------------------------------------------------------
 	fsm: process(pres_state, s_Start_T0sync, T0syncT)
 	begin
-		next_state<=pres_state;
-		--To avoid latches we write the default values
+		next_state<=pres_state;
 		s_T0sync	<='0';
 		Rst_T0sync <= '1';
 		
@@ -139,9 +138,10 @@ BEGIN
 	-----------------------------------------------------------------------------
 	-- Busy signals
 	-----------------------------------------------------------------------------
-	s_Enable <= not Busy_i;
-	Shutter_o <= s_Enable and not s_Veto;
-	T0sync_o <= s_T0sync;
+	s_Enable <= not Veto_i;
+	s_Shutter <= not Busy_i and not Veto_i;
+	--Shutter_o <= s_Shutter;
+	--T0sync_o <= s_T0sync;
  
 	
 	-----------------------------------------------------------------------------
@@ -155,14 +155,22 @@ BEGIN
 			s_Start_T0sync_d3 <= s_Start_T0sync_d2;
 			s_Start_T0sync <= s_Start_T0sync_d2 and ( not s_Start_T0sync_d3); 
 		
-			s_Shutter_old <= s_Shutter;
+			s_Shutter_d1 <= s_Shutter;
 		
 			if logic_reset_i = '1' then
 				s_RunNumber <= (others => '0');
-			elsif s_Shutter='1' and s_Shutter_old='0' then
+			elsif s_Shutter='1' and s_Shutter_d1='0' then
 				s_RunNumber <= s_RunNumber + 1;
 			end if;
 		end if;
+		-- Signals synchronous with falling edge clock
+		if falling_edge(clk_i) then
+			s_Shutter_d1f <= s_Shutter;
+			Shutter_o <= s_Shutter_d1f;
+			
+			s_T0sync_d1f <= s_T0sync;
+			T0sync_o <= s_T0sync_d1f;
+		end if;
  end process p_run_counter;
  
 END ARCHITECTURE rtl;