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FMC TDC 1ns 5cha - Gateware
Commit b8c90080 authored by egousiou's avatar egousiou
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use of latest wishbone_pkg version; 

small changes on vic addressing

git-svn-id: http://svn.ohwr.org/fmc-tdc@138 85dfdc96-de2c-444c-878d-45b388be74a9
parent c863a036
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Showing with 278 additions and 31 deletions
hdl/ip_cores/wishbone/wishbone_pkg.vhd
View file @ b8c90080
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hdl/rtl/acam_databus_interface.vhd
View file @ b8c90080
......@@ -13,7 +13,7 @@
-- File acam_databus_interface.vhd |
-- |
-- Description The unit interfaces with the ACAM chip pins for the configuration of the registers|
-- and the aquisition of the timestamps. |
-- and the acquisition of the timestamps. |
-- The ACAM proprietary interface is converted to a WISHBONE classic interface, with |
-- which the unit communicates with the data_engine unit. |
-- The WISHBONE master is implemented in the data_engine and the slave in this unit. |
......
hdl/rtl/data_formatting.vhd
View file @ b8c90080
......@@ -357,12 +357,12 @@ begin
-- The following process makes essential calculations for the definition of the coarse time.
-- Regarding the signals: un_clk_i_cycles_offset, un_retrig_nb_offset, local_utc it has to be difined
-- if the values that characterize the current second or the one previous to it should be used.
-- In the case where: a timestamp came on the same retgigger after a new second
-- In the case where: a timestamp came on the same retrigger after a new second
-- (un_current_retrig_from_roll_over is 0 and un_acam_start_nb = un_current_retrig_nb_offset)
-- the values of the previous second should be used.
-- Also, according to the ACAM documentation there is an indeterminacy to whether the fine time refers
-- to the previous retrigger or the current one. The equation described on line 386 describes
-- the case where: a timestamp came on the same retgigger after a new second but the ACAM assigned
-- the case where: a timestamp came on the same retrigger after a new second but the ACAM assigned
-- it to the previous retrigger (the "un_current_retrig_from_roll_over = 0" describes that a new second
-- has arrived; the "un_acam_fine_time > 6318" desribes a fine time that is referred to the previous retrigger;
-- 6318 * 81ps = 512ns which is a complete ACAM retrigger).
......
hdl/syn/svec/svec-tdc-fmc.gise
View file @ b8c90080
......@@ -103,7 +103,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1383822997" xil_pn:in_ck="5268971704634117961" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="7543648610729664005" xil_pn:start_ts="1383822823">
<transform xil_pn:end_ts="1384338996" xil_pn:in_ck="5268971704634117961" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="7543648610729664005" xil_pn:start_ts="1384338805">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
......@@ -125,7 +125,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1383823013" xil_pn:in_ck="-3760130385703199631" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="8504525175841796663" xil_pn:start_ts="1383822997">
<transform xil_pn:end_ts="1384339012" xil_pn:in_ck="-3760130385703199631" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="8504525175841796663" xil_pn:start_ts="1384338996">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
......@@ -135,7 +135,7 @@
<outfile xil_pn:name="top_tdc.ngd"/>
<outfile xil_pn:name="top_tdc_ngdbuild.xrpt"/>
</transform>
<transform xil_pn:end_ts="1383823223" xil_pn:in_ck="-7440346353620165565" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="7568465460566446564" xil_pn:start_ts="1383823013">
<transform xil_pn:end_ts="1384339231" xil_pn:in_ck="-7440346353620165565" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="7568465460566446564" xil_pn:start_ts="1384339012">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
......@@ -148,7 +148,7 @@
<outfile xil_pn:name="top_tdc_summary.xml"/>
<outfile xil_pn:name="top_tdc_usage.xml"/>
</transform>
<transform xil_pn:end_ts="1383823767" xil_pn:in_ck="4998236143670007004" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-7978487711023391987" xil_pn:start_ts="1383823223">
<transform xil_pn:end_ts="1384339823" xil_pn:in_ck="4998236143670007004" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-7978487711023391987" xil_pn:start_ts="1384339231">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
......@@ -163,7 +163,7 @@
<outfile xil_pn:name="top_tdc_pad.txt"/>
<outfile xil_pn:name="top_tdc_par.xrpt"/>
</transform>
<transform xil_pn:end_ts="1383823828" xil_pn:in_ck="182976557419624816" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="-5293564962942599218" xil_pn:start_ts="1383823767">
<transform xil_pn:end_ts="1384339889" xil_pn:in_ck="182976557419624816" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="-5293564962942599218" xil_pn:start_ts="1384339823">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
......@@ -175,7 +175,7 @@
<outfile xil_pn:name="webtalk.log"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
</transform>
<transform xil_pn:end_ts="1383823767" xil_pn:in_ck="-7440346353620165697" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416185" xil_pn:start_ts="1383823744">
<transform xil_pn:end_ts="1384339823" xil_pn:in_ck="-7440346353620165697" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416185" xil_pn:start_ts="1384339778">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
......
hdl/syn/svec/top_tdc.bin
View file @ b8c90080
No preview for this file type
hdl/syn/svec/top_tdc.twr
View file @ b8c90080
......@@ -2250,7 +2250,7 @@ Design statistics:
------------------------------------Footnotes-----------------------------------
1) The minimum period statistic assumes all single cycle delays.
Analysis completed Thu Nov 07 12:29:26 2013
Analysis completed Wed Nov 13 11:50:23 2013
--------------------------------------------------------------------------------
Trace Settings:
......
hdl/syn/svec/top_tdc_summary.html
View file @ b8c90080
......@@ -2,7 +2,7 @@
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>top_tdc Project Status (11/07/2013 - 12:30:28)</B></TD></TR>
<TD ALIGN=CENTER COLSPAN='4'><B>top_tdc Project Status (11/13/2013 - 11:51:29)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>svec-tdc-fmc.xise</TD>
......@@ -471,21 +471,21 @@ System Settings</A>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:16:37 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/xst.xmsgs?&DataKey=Warning'>3317 Warnings (3306 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/xst.xmsgs?&DataKey=Info'>135 Infos (135 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.bld'>Translation Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:16:53 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>4 Warnings (2 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:20:23 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/map.xmsgs?&DataKey=Info'>279 Infos (279 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:29:04 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/par.xmsgs?&DataKey=Warning'>7 Warnings (7 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/par.xmsgs?&DataKey=Info'>2 Infos (2 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:36:35 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/xst.xmsgs?&DataKey=Warning'>3317 Warnings (3316 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/xst.xmsgs?&DataKey=Info'>135 Infos (135 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:36:52 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>4 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:40:31 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/map.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/map.xmsgs?&DataKey=Info'>279 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:49:38 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/par.xmsgs?&DataKey=Warning'>7 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/par.xmsgs?&DataKey=Info'>2 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:29:26 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (4 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Thu Nov 7 12:30:19 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/bitgen.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:50:23 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/trce.xmsgs?&DataKey=Info'>4 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\top_tdc.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Wed Nov 13 11:51:18 2013</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\_xmsgs/bitgen.xmsgs?&DataKey=Info'>1 Info (0 new)</A></TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Thu Nov 7 12:30:19 2013</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Thu Nov 7 12:30:28 2013</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Nov 13 11:51:20 2013</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/ohwr-fmc-tdc/hdl/syn/svec\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Wed Nov 13 11:51:28 2013</TD></TR>
</TABLE>
<br><center><b>Date Generated:</b> 11/07/2013 - 12:30:28</center>
<br><center><b>Date Generated:</b> 11/13/2013 - 11:51:29</center>
</BODY></HTML>
\ No newline at end of file
hdl/top/svec/sdb_meta_pkg.vhd
View file @ b8c90080
......@@ -60,11 +60,11 @@ package sdb_meta_pkg is
-- git log -1 --format="%H" | cut -c1-320
syn_commit_id => x"00000000",
-- Synthesis tool name (string, 8 char)
syn_tool_name => "SynpliDP",
syn_tool_name => "ISE_13_4",
-- Synthesis tool version (bcd encoded, 32-bit)
syn_tool_version => x"00201206",
-- Synthesis date (bcd encoded, 32-bit)
syn_date => x"20130629",
syn_date => x"20131113",
-- Synthesised by (string, 15 char)
syn_username => "egousiou ");
......@@ -74,8 +74,8 @@ package sdb_meta_pkg is
vendor_id => x"000000000000CE42", -- CERN
device_id => x"47c786a2", -- echo "spec_fmc-adc-100m14b4cha" | md5sum | cut -c1-8
version => x"00010001", -- bcd encoded, [31:16] = major, [15:0] = minor
date => x"20130629", -- yyyymmdd
name => "spec_fmctdc1ns5cha "));
date => x"20131113", -- yyyymmdd
name => "svec_fmctdc1ns5cha "));
end sdb_meta_pkg;
......
hdl/top/svec/top_tdc.vhd
View file @ b8c90080
......@@ -316,8 +316,8 @@ architecture rtl of top_tdc is
7 => f_sdb_embed_integration(c_SDB_INTEGRATION));
constant c_VIC_VECTOR_TABLE : t_wishbone_address_array(0 to 1) :=
(0 => x"00010000",
1 => x"00020000");
(0 => x"00040000",
1 => x"00060000");
---------------------------------------------------------------------------------------------------
-- Signals --
......@@ -819,7 +819,7 @@ begin
else
tdc1_irq_synch <= tdc1_irq_synch(0) & tdc1_irq;
tdc2_irq_synch <= tdc2_irq_synch(0) & tdc2_irq;
end if;
end if;
end if;
end process;
......
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