tdc: check DMA status register

Signed-off-by: Samuel Iglesias Gonsálvez's avatarSamuel Iglesias Gonsálvez <siglesias@igalia.com>
parent 69f622d3
...@@ -28,6 +28,12 @@ ...@@ -28,6 +28,12 @@
#define TDC_DMA_NEXT_H_R 0x1C #define TDC_DMA_NEXT_H_R 0x1C
#define TDC_DMA_ATTRIB_R 0x20 #define TDC_DMA_ATTRIB_R 0x20
#define TDC_DMA_STAT_IDLE BIT(0)
#define TDC_DMA_STAT_DONE BIT(1)
#define TDC_DMA_STAT_BUSY BIT(2)
#define TDC_DMA_STAT_ERR BIT(3)
#define TDC_DMA_STAT_ABORT BIT(4)
/* ACAM GPX chip registers available */ /* ACAM GPX chip registers available */
#define TDC_ACAM_CFG_REG_0 0x20000 #define TDC_ACAM_CFG_REG_0 0x20000
#define TDC_ACAM_CFG_REG_1 0x20004 #define TDC_ACAM_CFG_REG_1 0x20004
......
...@@ -114,8 +114,12 @@ static void tdc_fmc_irq_work(struct work_struct *work) ...@@ -114,8 +114,12 @@ static void tdc_fmc_irq_work(struct work_struct *work)
wait_event(fmc_wait_dma, atomic_read(&fmc_dma_end)); wait_event(fmc_wait_dma, atomic_read(&fmc_dma_end));
/* DMA happened */ /* DMA happened */
/* TODO: Check DMASTATR register to see if there was an error */
atomic_set(&fmc_dma_end, 0); atomic_set(&fmc_dma_end, 0);
/* Check the status of the DMA */
if(readl(tdc->base + TDC_DMA_STAT_R) & (TDC_DMA_STAT_ERR | TDC_DMA_STAT_ABORT))
goto dma_out;
tdc->wr_pointer = curr_wr_ptr; tdc->wr_pointer = curr_wr_ptr;
/* Process the data */ /* Process the data */
...@@ -223,9 +227,9 @@ int tdc_fmc_probe(struct fmc_device *dev) ...@@ -223,9 +227,9 @@ int tdc_fmc_probe(struct fmc_device *dev)
/* XXX: Not implemented yet. Do we needed it? */ /* XXX: Not implemented yet. Do we needed it? */
#if 0 #if 0
/* Check if the device is DMA capable on 32 bits. */ /* Check if the device is DMA capable on 32 bits. */
if (pci_set_dma_mask(spec->pdev, DMA_BIT_MASK(32)) < 0 || if (pci_set_dma_mask(spec->pdev, DMA_BIT_MASK(64)) < 0) {
pci_set_consistent_dma_mask(spec->pdev, DMA_BIT_MASK(32)) < 0) { pr_err("error setting 64-bit DMA mask.\n");
pr_err("error setting 32-bit DMA mask.\n"); kfree(tdc);
return -ENXIO; return -ENXIO;
} }
#endif #endif
......
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