Addition of the generated file wb_uart_regs.vh and changes in the comments of…

Addition of the generated file wb_uart_regs.vh and changes in the comments of the new registers for PHYSICAL/VIRTUAL UART

Addition of the generated file wb_uart_regs.vh and changes in the comments of…
Addition of the generated file wb_uart_regs.vh and changes in the comments of the new registers for PHYSICAL/VIRTUAL UART
87660e4c · Konstantinos Blantos · 5278229a · 87660e4c · 87660e4c · 87660e4c
Commit 87660e4c authored Dec 06, 2023 by Konstantinos Blantos
Showing with 7 additions and 3 deletions

simple_uart_wb.wb modules/wishbone/wb_uart/simple_uart_wb.wb +2 -2

wb_simple_uart.vhd modules/wishbone/wb_uart/wb_simple_uart.vhd +1 -1

wb_uart_regs.vh testbench/wishbone/include/wb_uart_regs.vh +4 -0

No files found.
--- a/modules/wishbone/wb_uart/simple_uart_wb.wb
+++ b/modules/wishbone/wb_uart/simple_uart_wb.wb
@@ -105,7 +105,7 @@ peripheral {
            
            field {
                 name = "Physical UART";
-                 description = "Register to show that we are using Physical UART";
+                 description = "Set if the Physical UART is present";
 
                 prefix = "PHYSICAL_UART";
                 type = BIT;
@@ -116,7 +116,7 @@ peripheral {
 
            field {
                 name = "Virtual UART";
-                 description = "Register to show that we are using Virtual UART";
+                 description = "Set if the Virtual UART is present";
 
                 prefix = "VIRTUAL_UART";
                 type = BIT;

--- a/modules/wishbone/wb_uart/wb_simple_uart.vhd
+++ b/modules/wishbone/wb_uart/wb_simple_uart.vhd
@@ -457,7 +457,7 @@ begin  -- arch

  regs_in.host_tdr_rdy_i <= not regs_in.sr_rx_rdy_i;

-  -- Registers used to clarify if we use Physical or Virtual UART
+  -- Registers to set if the Physical or Virtual UART is present 
  regs_in.sr_physical_uart_i <= '1' when g_WITH_PHYSICAL_UART else '0';
  regs_in.sr_virtual_uart_i  <= '1' when g_WITH_VIRTUAL_UART  else '0';


--- a/testbench/wishbone/include/wb_uart_regs.vh
+++ b/testbench/wishbone/include/wb_uart_regs.vh
@@ -17,6 +17,10 @@
 `define UART_SR_RX_FIFO_OVERFLOW 32'h00000080
 `define UART_SR_RX_FIFO_BYTES_OFFSET 8
 `define UART_SR_RX_FIFO_BYTES 32'h00ffff00
+`define UART_SR_PHYSICAL_UART_OFFSET 24
+`define UART_SR_PHYSICAL_UART 32'h01000000
+`define UART_SR_VIRTUAL_UART_OFFSET 25
+`define UART_SR_VIRTUAL_UART 32'h02000000
 `define ADDR_UART_BCR                  5'h4
 `define ADDR_UART_TDR                  5'h8
 `define UART_TDR_TX_DATA_OFFSET 0