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Platform-independent core collection
Commit a9327d81 authored by Tristan Gingold's avatar Tristan Gingold
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Merge branch 'pr-constraints-script' into 'master' 

tools: trying to improve the CDC primitive constraint scripts to find all…

See merge request !44
parents 67fde761 8a1b9a1c
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Showing with 124 additions and 29 deletions
tools/generate_cdc_constraints.tcl
View file @ a9327d81
......@@ -32,27 +32,26 @@
# set_msg_config -id "Vivado 12-508" -limit 999999
proc generate_gc_sync_constraints { f_out } {
set the_cells [ get_cells -hier -filter { REF_NAME=~gc_sync* } ]
set the_cells [ get_cells -hier -filter { REF_NAME==gc_sync || ORIG_REF_NAME==gc_sync } ]
set count 0
puts $f_out "# gc_sync"
puts $f_out "###########"
foreach cell $the_cells {
#skip non gc_sync instances (as they contain a gc_sync inside)
set name [get_property REF_NAME $cell]
if {[string first "gc_sync_ffs" "$name"] != -1
|| [string first "gc_sync_word_" "$name"] != -1
|| [string first "gc_sync_register" "$name"] != -1} {
puts $f_out "#NOTE: skip '$name' cell '$cell'"
continue
}
puts $f_out ""
puts $f_out "### Cell $cell"
set dst_ff_clr [get_pins "$cell/sync_*.sync*_*/CLR" ]
set dst_ff [get_pins "$cell/sync_*.sync0_*/D" ]
set dst_ff [get_cells "$cell/sync_*.sync0_reg*" ]
if { "$dst_ff" == "" } {
set dst_ff [get_pins -hier -filter "name=~$cell/sync_*.sync0_*/D" ]
puts $f_out "#NOTE: no sync0_reg"
set dst_ff [get_cells -hier -filter "name=~$cell/sync_*.sync0_reg*" ]
}
if { "$dst_ff_clr" == "" } {
puts $f_out "#NOTE: no CLR pin"
set dst_ff_clr [get_pins -hier -filter "name=~$cell/sync_*.sync*_*/CLR" ]
}
......@@ -61,13 +60,65 @@ proc generate_gc_sync_constraints { f_out } {
continue
}
set clk [ get_clocks -of_objects [ get_pins -filter {REF_PIN_NAME=~clk_i*} -of $cell ] ]
set src_cells [get_cells -of_objects [get_pins -filter {IS_LEAF && DIRECTION == OUT} -of_objects [get_nets -segments -of_objects $dst_ff]]]
set src_ff [ get_pins -filter {DIRECTION == OUT} -of_objects $src_cells ]
set clk [ get_clocks -of_objects [ get_pins -filter {REF_PIN_NAME=~clk_i*} -of [get_cells $cell] ] ]
if { [ llength $clk] == 0 } {
puts $f_out "#WARNING: cell '$cell' has no clock, skipping"
continue
}
puts $f_out "#DST_FF $dst_ff"
set dst_fan_in [ all_fanin -startpoints_only -flat [ get_pins "$dst_ff/D"] ]
# puts $f_out "#FAN-IN: $dst_fan_in"
# puts $f_out "# fan-in: "
# foreach s $dst_fan_in {
# puts $f_out "# $s"
# #report_property $src_cell
# }
# Note: do we need to filter fanin ? Not sure why.
set src_clk_pins [ get_pins -filter {IS_CLOCK==1} $dst_fan_in ]
set src_cell_pins [ get_pins -filter {DIRECTION==OUT} $dst_fan_in ]
# Note: can you have ports ? Usually a port (top-level pin) is
# first connected to an IOB.
set src_ports [ get_ports $dst_fan_in ]
set clk_period [get_property PERIOD [ lindex $clk 0 ] ]
puts $f_out "#Cell: $cell, src $src_ff, dst $dst_ff, clock $clk, period $clk_period"
puts $f_out "set_max_delay $clk_period -datapath_only -from { $src_ff } -to { $dst_ff }"
foreach s $src_clk_pins {
puts $f_out "#SRC-CLK: $s"
#report_property $src_cell
}
foreach s $src_ports {
puts $f_out "#SRC-PORT: $s"
#report_property $src_cell
}
foreach s $src_cell_pins {
puts $f_out "#SRC-PIN: $s"
#report_property $src_cell
}
puts $f_out "#CLK: $clk (period: $clk_period)"
set srcs [ concat $src_clk_pins $src_ports $src_cell_pins ]
if { [ llength $srcs] == 0 } {
# Maybe connected to 0 or 1.
# Vivado also emits a warning.
puts $f_out "#WARNING: no fan-in found for $cell"
continue
}
if { [ llength $srcs] > 1 } {
# Can this happen ?
puts $f_out "#WARNING: several inputs for cell"
}
# Emit constraints.
puts $f_out "set_max_delay $clk_period -datapath_only -from { $srcs } -to { $dst_ff }"
foreach clr_pin $dst_ff_clr {
puts $f_out "set_false_path -to { $clr_pin }"
}
......@@ -78,35 +129,71 @@ proc generate_gc_sync_constraints { f_out } {
}
proc generate_gc_sync_register_constraints { f_out } {
set the_cells [ get_cells -hier -filter { REF_NAME=~gc_sync_register* } ]
set the_cells [ get_cells -hier -filter { REF_NAME==gc_sync_register || ORIG_REF_NAME==gc_sync_register} ]
set count 0
puts $f_out "# gc_sync_register"
puts $f_out "##################"
foreach cell $the_cells {
puts $f_out ""
puts $f_out "#Cell: $cell"
set dst_ff_clr [get_pins "$cell/sync*_*[*]/CLR" ]
set dst_ff [get_pins "$cell/sync0_*[*]/D" ]
set dst_ff_d [get_pins "$cell/sync0_*[*]/D" ]
if { "$dst_ff" == "" } {
set dst_ff [get_pins -hier -filter "name=~$cell/sync0_*[*]/D" ]
if { "$dst_ff_d" == "" } {
puts $f_out "#NOTE: no sync0_reg"
set dst_ff_d [get_pins -hier -filter "name=~$cell/sync0_*[*]/D" ]
}
if { "$dst_ff_clr" == "" } {
puts $f_out "#NOTE: no CLR pin"
set dst_ff_clr [get_pins -hier -filter "name=~$cell/sync*_*[*]/CLR" ]
}
if { "$dst_ff" == "" } {
if { "$dst_ff_d" == "" } {
puts $f_out "#WARNING: can't find destination FF for sync reg cell '$cell'"
continue
}
set clk [ get_clocks -of_objects [ get_pins -filter {REF_PIN_NAME=~clk_i*} -of $cell ] ]
set src_ff [get_cells -of_objects [get_pins -filter {IS_LEAF && DIRECTION == OUT} -of_objects [get_nets -segments -of_objects $dst_ff]]]
if { [ llength $clk] == 0 } {
puts $f_out "#WARNING: cell '$cell' has no clock, skipping"
continue
}
set all_src_ffs []
foreach dst_pin $dst_ff_d {
puts $f_out "#DST_PINS: $dst_pin"
#set src_cell [get_cells -of_objects [get_pins -filter {IS_LEAF && DIRECTION == OUT} -of_objects [get_nets -segments -of_objects [get_pins "$dst_cell/D"]]]]
set src_cell [ all_fanin -startpoints_only -flat $dst_pin ]
if { [ llength $src_cell ] == 0 } {
# Connected to 0/1.
puts $f_out "#WARNING: no fan-in found for $dst_pin"
continue
}
puts $f_out "#SRC_CELL $src_cell"
lappend all_src_ffs [ lindex $src_cell 0 ]
}
if { [ llength $all_src_ffs ] == 0 } {
continue
}
set clk_period [get_property PERIOD [ lindex $clk 0 ] ]
#foreach src_cell $src_cells {
#puts "SRC: $src_cell"
#}
puts $f_out "#Cell: $cell, src $all_src_ffs, dst $dst_ff_d, clock $clk, period $clk_period"
puts $f_out "set_max_delay $clk_period -quiet -datapath_only -from { $all_src_ffs } -to { $dst_ff_d }"
puts $f_out "set_bus_skew $clk_period -quiet -from { $all_src_ffs } -to { $dst_ff_d }"
puts $f_out "#Cell: $cell, src $src_ff, dst $dst_ff, clock $clk, period $clk_period"
puts $f_out "set_max_delay $clk_period -quiet -datapath_only -from { $src_ff } -to { $dst_ff }"
puts $f_out "set_bus_skew $clk_period -quiet -from { $src_ff } -to { $dst_ff }"
foreach clr_pin $dst_ff_clr {
puts $f_out "set_false_path -to { $clr_pin }"
}
......@@ -120,6 +207,9 @@ proc generate_gc_sync_word_constraints { f_out } {
set the_cells [ get_cells -hier -filter { REF_NAME=~gc_sync_word_* } ]
set count 0
puts $f_out "# gc_sync_word"
puts $f_out "##############"
foreach cell $the_cells {
set src_ffs [get_pins "$cell/gc_sync_word_data_reg[*]/Q" ]
......@@ -151,6 +241,9 @@ proc generate_gc_reset_multi_aasd_constraints { f_out } {
set the_cells [ get_cells -hier -filter { REF_NAME=~gc_reset_multi_aasd* } ]
set count 0
puts $f_out "# gc_reset_multi_aasd"
puts $f_out "#####################"
foreach cell $the_cells {
set dst_ff_clr [get_pins "$cell/*rst_chains_reg[*]/CLR" ]
......@@ -158,7 +251,7 @@ proc generate_gc_reset_multi_aasd_constraints { f_out } {
set dst_ff_clr [get_pins -hier -filter "name=~$cell/*rst_chains_reg[*]/CLR" ]
}
if { "$dst_ff_clr" == "" } {
if { "$dst_ff_clr" == "" } {
puts $f_out "#WARNING: can't find destination FF CLR pin for cell '$cell'"
continue
}
......@@ -183,7 +276,7 @@ proc generate_gc_falsepath_waiver_constraints { f_out } {
set src_ff [get_pins -hier -filter "name=~$cell/in_i[*]" ]
}
if { "$src_ff" == "" } {
if { "$src_ff" == "" } {
puts $f_out "#WARNING: can't find source pin for '$cell'"
continue
}
......@@ -200,8 +293,11 @@ proc generate_gc_falsepath_waiver_constraints { f_out } {
set f_out [open "gencores_constraints.xdc" w]
set n_gc_sync_cells [ generate_gc_sync_constraints $f_out ]
puts $f_out ""
set n_gc_sync_register_cells [ generate_gc_sync_register_constraints $f_out ]
puts $f_out ""
set n_gc_reset_multi_aasd_cells [ generate_gc_reset_multi_aasd_constraints $f_out ]
puts $f_out ""
set n_gc_sync_word_cells [ generate_gc_sync_word_constraints $f_out ]
#set n_gc_falsepath_waiver_cells [ generate_gc_falsepath_waiver_constraints $f_out ]
puts "gencores CDC statistics: "
......@@ -212,4 +308,3 @@ puts " - gc_reset_multi_aasd: $n_gc_reset_multi_aasd_cells instances"
#puts " - gc_falsepath_waiver: $n_gc_falsepath_waiver_cells instances"
close $f_out
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