Fixed figure 8 (variables can't be declared after the architecture declaration)…

Fixed figure 8 (variables can't be declared after the architecture declaration) and changelog (2003 -> 2009)

Fixed figure 8 (variables can't be declared after the architecture declaration)…
Fixed figure 8 (variables can't be declared after the architecture declaration) and changelog (2003 -> 2009)
316cb5bd · Javier Serrano · 040b6224 · 316cb5bd · 316cb5bd
Commit 316cb5bd authored Sep 15, 2010 by Javier Serrano
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VHDLcoding.tex trunk/documentation/vhdl_guidelines/VHDLcoding.tex +1 -1

rules.tex trunk/documentation/vhdl_guidelines/rules.tex +0 -1

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--- a/trunk/documentation/vhdl_guidelines/VHDLcoding.tex
+++ b/trunk/documentation/vhdl_guidelines/VHDLcoding.tex
@@ -100,7 +100,7 @@ This version was printed on \today.
 	\item \emph{Doxygen} chapter modified
 \end{itemize}
-2003-02-19
+2009-02-19
 \begin{itemize}
 	\item SVN revision number / date
 	\item \emph{Doxygen} and Changelog chapters added

--- a/trunk/documentation/vhdl_guidelines/rules.tex
+++ b/trunk/documentation/vhdl_guidelines/rules.tex
@@ -414,7 +414,6 @@ end entity my_entity;
 architecture rtl of my_entity is
 constant c_INITIAL  : std_logic_vector (2 downto 0) := "111"; -- initial value
-variable v_register : std_logic_vector (7 downto 0);          -- stores data_i
 		\end{lstlisting}
 	\end{center}
 	\caption{Buses}