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Hdlmake
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d342f521c8dee51c4024912be9ed2ff4d0845cf4
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hdl-make
tests
counter
sim
iverilog
vhdl
Manifest.py
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Add IVerilog VHDL based counter test
· e8d09edb
Garcia-Lasheras
authored
Feb 07, 2015
e8d09edb
Manifest.py
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