Move the info file messages when parsing VHDL and VLOG to the debug log level

parent d49552fa
...@@ -43,7 +43,7 @@ class VHDLParser(DepParser): ...@@ -43,7 +43,7 @@ class VHDLParser(DepParser):
from .dep_file import DepRelation from .dep_file import DepRelation
if dep_file.is_parsed: if dep_file.is_parsed:
return return
logging.info("Parsing %s", dep_file.path) logging.debug("Parsing %s", dep_file.path)
def _preprocess(vhdl_file): def _preprocess(vhdl_file):
"""Preprocess the supplied VHDL file instance""" """Preprocess the supplied VHDL file instance"""
......
...@@ -570,7 +570,7 @@ class VerilogParser(DepParser): ...@@ -570,7 +570,7 @@ class VerilogParser(DepParser):
all of the detected dependency relations""" all of the detected dependency relations"""
if dep_file.is_parsed: if dep_file.is_parsed:
return return
logging.info("Parsing %s", dep_file.path) logging.debug("Parsing %s", dep_file.path)
# assert isinstance(dep_file, DepFile), print("unexpected type: " + # assert isinstance(dep_file, DepFile), print("unexpected type: " +
# str(type(dep_file))) # str(type(dep_file)))
buf = self.preprocessor.preprocess(dep_file) buf = self.preprocessor.preprocess(dep_file)
......
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