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Hdlmake
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f6244ad2
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f6244ad2
authored
Jun 09, 2017
by
Javier D. Garcia-Lasheras
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Add default_nettype to the Verilog preprocessor keywords
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08e18b3b
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hdlmake/vlog_parser.py
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f6244ad2
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@@ -44,6 +44,7 @@ class VerilogPreprocessor(object):
# Reserved verilog preprocessor keywords. The list is certainly not full
vpp_keywords
=
[
"default_nettype"
,
"define"
,
"line"
,
"include"
,
...
...
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