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S
Scalable MAROC Charge Sensitive Readout
Commit f9bf008a authored by David Cussans's avatar David Cussans
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Committing changes before moving to Git 

git-svn-id: https://svn2.phy.bris.ac.uk/svn/uob-hep-pc049a/trunk@45 e1591323-3689-4d5a-aa31-d1a7cbdc5706
parent 3df8f56d
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Showing with 2404 additions and 2440 deletions
design_files/pc049a_lemo_db.cpm
View file @ f9bf008a
{ Machine generated file created by SPI } { Machine generated file created by SPI }
{ Last modified was 14:32:01 Wednesday, March 04, 2015 } { Last modified was 18:24:32 Monday, July 27, 2015 }
{ NOTE: Do not modify the contents of this file. If this is regenerated by } { NOTE: Do not modify the contents of this file. If this is regenerated by }
{ SPI, your modifications will be overwritten. } { SPI, your modifications will be overwritten. }
...@@ -16,6 +16,16 @@ physical_path './worklib/pc049a_db/physical' ...@@ -16,6 +16,16 @@ physical_path './worklib/pc049a_db/physical'
cdsprop_file '' cdsprop_file ''
END_GLOBAL END_GLOBAL
START_CONCEPTHDL
PLOT_FIT_TO_PAGE 'ON'
PAPER_SIZE '9'
PAPER_ORIENTATION '2'
PAPER_SOURCE '15'
WPLOTTER_NAME 'Generic PostScript Printer'
PLOTTER_FACILITY 'DEVICE'
PLOT_EDGE_TO_EDGE 'ON'
END_CONCEPTHDL
START_PKGRXL START_PKGRXL
regenerate_physical_net_name 'OFF' regenerate_physical_net_name 'OFF'
electrical_constraints 'ON' electrical_constraints 'ON'
......
design_files/pc049a_toplevel.cpm
View file @ f9bf008a
{ Machine generated file created by SPI } { Machine generated file created by SPI }
{ Last modified was 15:08:38 Monday, March 23, 2015 } { Last modified was 12:44:26 Thursday, January 07, 2016 }
{ NOTE: Do not modify the contents of this file. If this is regenerated by } { NOTE: Do not modify the contents of this file. If this is regenerated by }
{ SPI, your modifications will be overwritten. } { SPI, your modifications will be overwritten. }
......
design_files/worklib/pc043c_single_maroc/cfg_package/expand.cfg
View file @ f9bf008a
config pc043c_single_maroc; config pc043c_single_maroc;
design uob_hep_pc049a_lib.pc043c_single_maroc:sch_1; design uob_hep_pc049a_lib.pc043c_single_maroc:sch_1;
liblist uob_hep_pc049a_lib, bris_cds_analogue, bris_cds_connectors, bris_cds_discrete, bris_cds_logic, bris_cds_memory, bris_cds_pld, bris_cds_special, bris_cds_standard, bris_cds_switches, cn74lv, cn74tiac, cn75als, cncmos, cnconnector, cndiscrete, cnpassive, cnpld, cnpower, cnspecial, cnstandard, cnvlsi, standard, cnlinear; liblist uob_hep_pc049a_lib, bris_cds_analogue, bris_cds_connectors, bris_cds_discrete, bris_cds_logic, bris_cds_memory, bris_cds_pld, bris_cds_special, bris_cds_standard, bris_cds_switches, cn74lv, cn74tiac, cn75als, cncmos, cnconnector, cndiscrete, cnpassive, cnpld, cnpower, cnspecial, cnstandard, cnvlsi, standard, cnlinear, cnmemory, cninterface, cnmech, cnmicro, help, cn100e, cn10e, cn10el, cn10k, cn10kh;
viewlist chips, pic_1, picopt_1, sch_1, schematic, entity, functional; viewlist chips, pic_1, picopt_1, sch_1, schematic, entity, functional;
stoplist chips; stoplist chips;
endconfig endconfig
design_files/worklib/pc043c_single_maroc/sch_1/module_order.dat
View file @ f9bf008a
Version 15.0 Version 15.0
START_MODULEORDER START_MODULEORDER
@uob_hep_pc049a_lib.pc043c_single_maroc(sch_1) 0 1 1 3 0 @uob_hep_pc049a_lib.pc043c_single_maroc(SCH_1) 0 0 1 3 0
END_MODULEORDER END_MODULEORDER
design_files/worklib/pc049a_db/physical/batch_drc.log
View file @ f9bf008a
...@@ -2,9 +2,9 @@ ...@@ -2,9 +2,9 @@
( ) ( )
( DRC Update ) ( DRC Update )
( ) ( )
( Drawing : pc049a_lemo_db_12.brd ) ( Drawing : pc049a_lemo_db_4l_13.brd )
( Software Version : 16.6S014 ) ( Software Version : 16.6-2015S055 )
( Date/Time : Wed Mar 4 14:00:05 2015 ) ( Date/Time : Wed Mar 16 12:12:00 2016 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
......
design_files/worklib/pc049a_db/physical/dbdoctor.log
View file @ f9bf008a
...@@ -2,9 +2,9 @@ ...@@ -2,9 +2,9 @@
( ) ( )
( DBDOCTOR ) ( DBDOCTOR )
( ) ( )
( Drawing : pc049a_lemo_db_12.brd ) ( Drawing : pc049a_lemo_db_4l_13.brd )
( Software Version : 16.6S014 ) ( Software Version : 16.6-2015S055 )
( Date/Time : Wed Mar 4 14:55:24 2015 ) ( Date/Time : Wed Mar 16 12:12:18 2016 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
......
design_files/worklib/pc049a_db/physical/interconn.iml
View file @ f9bf008a
...@@ -3100,6 +3100,362 @@ CMATRIX ...@@ -3100,6 +3100,362 @@ CMATRIX
LMATRIX LMATRIX
6.691000e-07 6.691000e-07
END RLGC END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_37
(IDL ".subckt STL_1S_1R_37
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=4000 botDist=0.0018032
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0016
*EMIinfo Plane Z=3.048e-05
.layerstack Layerstack2
+shield( 3.048e-05 1 0)
+dielectric( 0.0016 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0018032 0.0004 0.00183368 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaab16081.in 0.00127
.rlgc RLGCSTL_1S_1R_37 ( Length=length N=1 )
.C 0
+ 4.741400e-11
.L 0
+ 6.927200e-07
.G 0
+ 0.000000e+00
.R 0
+ 1.376400e+00
.C INF
+ 4.741400e-11
.L INF
+ 6.927200e-07
.Td INF
+ 5.731000e-09
.Yc INF
+ 8.273200e-03
.Zc INF
+ 1.208700e+02
.endrlgc RLGCSTL_1S_1R_37
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 5.731000e-09
*Admittance Matrix.
*Y 0 (n=1)
* 8.273200e-03
*Impedance Matrix.
*Z 0 (n=1)
* 1.208700e+02
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 7.073800e-01
.ends STL_1S_1R_37
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_37
FREQUENCY=0
CMATRIX
4.741400e-11
LMATRIX
6.927200e-07
GMATRIX
0.000000e+00
RMATRIX
1.376400e+00
FREQUENCY=INF
CMATRIX
4.741400e-11
LMATRIX
6.927200e-07
END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_38
(IDL ".subckt STL_1S_1R_38
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=4000 botDist=0.0020064
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0016
*EMIinfo Plane Z=3.048e-05
.layerstack Layerstack2
+shield( 3.048e-05 1 0)
+dielectric( 0.0016 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0020064 0.0004 0.00203688 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaac16081.in 0.00127
.rlgc RLGCSTL_1S_1R_38 ( Length=length N=1 )
.C 0
+ 4.590700e-11
.L 0
+ 7.138800e-07
.G 0
+ 0.000000e+00
.R 0
+ 1.376400e+00
.C INF
+ 4.590700e-11
.L INF
+ 7.138800e-07
.Td INF
+ 5.724700e-09
.Yc INF
+ 8.019100e-03
.Zc INF
+ 1.247000e+02
.endrlgc RLGCSTL_1S_1R_38
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 5.724700e-09
*Admittance Matrix.
*Y 0 (n=1)
* 8.019100e-03
*Impedance Matrix.
*Z 0 (n=1)
* 1.247000e+02
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 7.138000e-01
.ends STL_1S_1R_38
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_38
FREQUENCY=0
CMATRIX
4.590700e-11
LMATRIX
7.138800e-07
GMATRIX
0.000000e+00
RMATRIX
1.376400e+00
FREQUENCY=INF
CMATRIX
4.590700e-11
LMATRIX
7.138800e-07
END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_39
(IDL ".subckt STL_1S_1R_39
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=4000 botDist=0.0022096
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Dielectric Eps=4.5 Thick=0.0016
*EMIinfo Plane Z=3.048e-05
.layerstack Layerstack2
+shield( 3.048e-05 1 0)
+dielectric( 0.0016 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0022096 0.0004 0.00224008 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaad16081.in 0.00127
.rlgc RLGCSTL_1S_1R_39 ( Length=length N=1 )
.C 0
+ 4.462400e-11
.L 0
+ 7.329700e-07
.G 0
+ 0.000000e+00
.R 0
+ 1.376400e+00
.C INF
+ 4.462400e-11
.L INF
+ 7.329700e-07
.Td INF
+ 5.719100e-09
.Yc INF
+ 7.802600e-03
.Zc INF
+ 1.281600e+02
.endrlgc RLGCSTL_1S_1R_39
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 5.719100e-09
*Admittance Matrix.
*Y 0 (n=1)
* 7.802600e-03
*Impedance Matrix.
*Z 0 (n=1)
* 1.281600e+02
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 7.193600e-01
.ends STL_1S_1R_39
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_39
FREQUENCY=0
CMATRIX
4.462400e-11
LMATRIX
7.329700e-07
GMATRIX
0.000000e+00
RMATRIX
1.376400e+00
FREQUENCY=INF
CMATRIX
4.462400e-11
LMATRIX
7.329700e-07
END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_40
(IDL ".subckt STL_1S_1R_40
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=4000 botDist=0.0002032
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0002032
*EMIinfo Plane Z=0.00186416
.layerstack Layerstack3
+shield( 3.048e-05 1 0.035)
+dielectric( 0.0002032 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0002032 0.0004 0.00023368 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaae16081.in 0.00127
.rlgc RLGCSTL_1S_1R_40 ( Length=length N=1 )
.C 0
+ 1.278800e-10
.L 0
+ 2.850700e-07
.G 0
+ 0.000000e+00
.R 0
+ 1.376400e+00
.C INF
+ 1.278800e-10
.L INF
+ 2.850700e-07
.Td INF
+ 6.037800e-09
.Yc INF
+ 2.118000e-02
.Zc INF
+ 4.721400e+01
.endrlgc RLGCSTL_1S_1R_40
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 6.037800e-09
*Admittance Matrix.
*Y 0 (n=1)
* 2.118000e-02
*Impedance Matrix.
*Z 0 (n=1)
* 4.721400e+01
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 4.856700e-01
.ends STL_1S_1R_40
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_40
FREQUENCY=0
CMATRIX
1.278800e-10
LMATRIX
2.850700e-07
GMATRIX
0.000000e+00
RMATRIX
1.376400e+00
FREQUENCY=INF
CMATRIX
1.278800e-10
LMATRIX
2.850700e-07
END RLGC
" ) " )
(Frequency 0 ) ) ) (Frequency 0 ) ) )
(LibraryVersion 136.2 ) ) (LibraryVersion 136.2 ) )
\ No newline at end of file
design_files/worklib/pc049a_db/physical/interconn.iml,1
View file @ f9bf008a
...@@ -2928,6 +2928,178 @@ CMATRIX ...@@ -2928,6 +2928,178 @@ CMATRIX
LMATRIX LMATRIX
4.201500e-07 4.201500e-07
END RLGC END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_35
(IDL ".subckt STL_1S_1R_35
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=8000 botDist=0.0016
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0016
*EMIinfo Plane Z=3.048e-05
.layerstack Layerstack2
+shield( 3.048e-05 1 0)
+dielectric( 0.0016 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0016 0.0008 0.00163048 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaaa22601.in 0.00127
.rlgc RLGCSTL_1S_1R_35 ( Length=length N=1 )
.C 0
+ 6.273000e-11
.L 0
+ 5.428900e-07
.G 0
+ 0.000000e+00
.R 0
+ 6.882100e-01
.C INF
+ 6.273000e-11
.L INF
+ 5.428900e-07
.Td INF
+ 5.835700e-09
.Yc INF
+ 1.074900e-02
.Zc INF
+ 9.302900e+01
.endrlgc RLGCSTL_1S_1R_35
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 5.835700e-09
*Admittance Matrix.
*Y 0 (n=1)
* 1.074900e-02
*Impedance Matrix.
*Z 0 (n=1)
* 9.302900e+01
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 6.504200e-01
.ends STL_1S_1R_35
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_35
FREQUENCY=0
CMATRIX
6.273000e-11
LMATRIX
5.428900e-07
GMATRIX
0.000000e+00
RMATRIX
6.882100e-01
FREQUENCY=INF
CMATRIX
6.273000e-11
LMATRIX
5.428900e-07
END RLGC
" )
(Frequency 0 ) )
(STL_1S_1R_36
(IDL ".subckt STL_1S_1R_36
+X1 0
+X2 0
*MaxTraceWidthLimit = 0
*MeshSize = 0.00127
*CutoffFrequency = 0
*Trapezoidal_Angle_in_Degree = 90.000000
*EMIinfo Type Top MicroStrip
*EMIinfo Conductor Width=4000 botDist=0.0016
*EMIinfo Dielectric Eps=1 Thick=3.048e-05
*EMIinfo Dielectric Eps=4.5 Thick=0.0016
*EMIinfo Plane Z=3.048e-05
.layerstack Layerstack2
+shield( 3.048e-05 1 0)
+dielectric( 0.0016 4.5 0.035 )
+dielectric( 3.048e-05 1 0 )
.crosssection
+rectangle ( 5.959e+07 0 0.0016 0.0004 0.00163048 )
+Length=length
*FieldSolver: bem2d 0 /tmp/#Taaaaab22601.in 0.00127
.rlgc RLGCSTL_1S_1R_36 ( Length=length N=1 )
.C 0
+ 4.922100e-11
.L 0
+ 6.691000e-07
.G 0
+ 0.000000e+00
.R 0
+ 1.376400e+00
.C INF
+ 4.922100e-11
.L INF
+ 6.691000e-07
.Td INF
+ 5.738800e-09
.Yc INF
+ 8.576900e-03
.Zc INF
+ 1.165900e+02
.endrlgc RLGCSTL_1S_1R_36
**The Characteristic Modal Delay, Admittance and
**Impedance Matrices of these Transmission Lines:
*Delay Matrix.
*Td 0 (n=1)
* 5.738800e-09
*Admittance Matrix.
*Y 0 (n=1)
* 8.576900e-03
*Impedance Matrix.
*Z 0 (n=1)
* 1.165900e+02
**The Near-End Crosstalk Coefficent of these Transmission
**Lines based on Near-End Resistance=50 ohm assumption:
*Near-End Crosstalk Coefficent Matrix, Z0*Inv(R+Z0).
* 0 (n=1)
* 6.998700e-01
.ends STL_1S_1R_36
" )
(KSPICE "DATAPOINTS RLGC STL_1S_1R_36
FREQUENCY=0
CMATRIX
4.922100e-11
LMATRIX
6.691000e-07
GMATRIX
0.000000e+00
RMATRIX
1.376400e+00
FREQUENCY=INF
CMATRIX
4.922100e-11
LMATRIX
6.691000e-07
END RLGC
" ) " )
(Frequency 0 ) ) ) (Frequency 0 ) ) )
(LibraryVersion 136.2 ) ) (LibraryVersion 136.2 ) )
\ No newline at end of file
design_files/worklib/pc049a_db/physical/signoise.log
View file @ f9bf008a
INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml' INFO: Loaded existing interconnect file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/interconn.iml'
INFO: Finished loading SigNoise device libraries INFO: Loaded existing interconnect file '/software/CAD/Cadence/2015-16/RHELx86/SPB_16.60.055/share/pcb/signal/cds_interconn.iml'
INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml' INFO: Finished loading SigNoise interconnect libraries
INFO: Finished loading SigNoise device libraries INFO: Field Solver bem2d for STL_1S_1R_37
INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml' INFO: Executing command: bem2d 0 "/tmp/#Taaaaab16081.in" 0.00127
INFO: Finished loading SigNoise device libraries INFO: Field Solver bem2d for STL_1S_1R_38
INFO: Executing command: bem2d 0 "/tmp/#Taaaaac16081.in" 0.00127
INFO: Field Solver bem2d for STL_1S_1R_39
INFO: Executing command: bem2d 0 "/tmp/#Taaaaad16081.in" 0.00127
INFO: Field Solver bem2d for STL_1S_1R_40
INFO: Executing command: bem2d 0 "/tmp/#Taaaaae16081.in" 0.00127
INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml' INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml'
INFO: Finished loading SigNoise device libraries INFO: Finished loading SigNoise device libraries
INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml' INFO: Loaded existing device file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/devices.dml'
......
design_files/worklib/pc049a_toplevel/physical/StepOutConfiguration.txt
View file @ f9bf008a
EXPORT_UNIT = Millimeter EXPORT_UNIT = Millimeter
EXPORT_PROTOCOL = 214 EXPORT_PROTOCOL = 214
BARE_BOARD_ONLY = NO BARE_BOARD_ONLY = NO
MAPPED_PACKAGE = YES MAPPED_PACKAGE = NO
UNMAPPED_PACKAGE = YES UNMAPPED_PACKAGE = YES
EXTERNAL_COPPER = NO EXTERNAL_COPPER = NO
MECH_PART = NO MECH_PART = NO
......
design_files/worklib/pc049a_toplevel/physical/allegro.jrl
View file @ f9bf008a
\t (00:00:06) allegro 16.6 S014 (v16-6-112AU) Linux I32 \t (46:40:47) allegro 16.6-2015 S055 (v16-6-112EH) Linux I32
\t (00:00:06) Journal start - Mon Mar 2 13:38:05 2015 \t (46:40:47) Journal start - Thu Feb 18 12:00:53 2016
\t (00:00:06) Host=voltar.phy.bris.ac.uk User=phdgc Pid=8751 CPUs=8 \t (46:40:47) Host=fortis.phy.bris.ac.uk User=phdgc Pid=27642 CPUs=4
\t (00:00:06) \t (46:40:47) CmdLine= /software/CAD/Cadence/2015-16/RHELx86/SPB_16.60.055//tools/pcb/bin/allegro.exe
\t (00:00:08) Opening existing design... \t (46:40:47)
\d (00:00:09) Database opened: /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_52.brd \d (46:40:47) Design opened: /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_52.brd
\i (00:00:09) trapsize 17235 \i (46:40:47) ifp
\i (00:00:10) trapsize 16883 \i (46:40:56) opencd /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_db/physical/pc049a_lemo_db_12.brd
\i (00:00:10) trapsize 17296 \t (46:40:57) Opening existing design...
\i (00:00:10) trapsize 15027 \t (46:40:57) Grids are drawn 0.8000, 0.8000 apart for enhanced viewability.
\i (00:00:10) trapsize 15027 \i (46:40:57) trapsize 7128
\i (00:00:12) ifp \t (46:40:57) Journal end - Thu Feb 18 12:01:03 2016
\i (00:00:31) open
\i (00:02:54) fillin "/projects/HEP_Instrumentation/cad/designs/uob-hep-pc035a/trunk/design_files/worklib/pc035a_mpickup_toplevel/physical/pc035b_mpickup_600mm_1800mm_05.brd"
\i (00:02:54) cd "/projects/HEP_Instrumentation/cad/designs/uob-hep-pc035a/trunk/design_files/worklib/pc035a_mpickup_toplevel/physical"
\t (00:02:54) Opening existing design...
\i (00:02:56) fillin yes
\i (00:02:56) trapsize 8149
\t (00:02:56) Journal end - Mon Mar 2 13:40:55 2015
design_files/worklib/pc049a_toplevel/physical/devices.dml
View file @ f9bf008a
("devices.dml" ("devices.dml"
(DesignLink
(pc049a_toplevel_52dl
(Drawings
(A "pc049a_toplevel_52.brd" ) ) ) )
(LibraryVersion 136.2 ) ) (LibraryVersion 136.2 ) )
\ No newline at end of file
design_files/worklib/pc049a_toplevel/physical/extract.log
View file @ f9bf008a
...@@ -35,6 +35,9 @@ GEOMETRY ...@@ -35,6 +35,9 @@ GEOMETRY
PACKAGE_HEIGHT_MIN PACKAGE_HEIGHT_MIN
PACKAGE_HEIGHT_MAX PACKAGE_HEIGHT_MAX
SYM_HAS_PIN_EDIT SYM_HAS_PIN_EDIT
SYM_DFA_DEV_CLASS
COMP_PACKAGE_HEIGHT_MIN
COMP_PACKAGE_HEIGHT_MAX
END END
# #
FULL_GEOMETRY FULL_GEOMETRY
...@@ -87,9 +90,37 @@ LAYER ...@@ -87,9 +90,37 @@ LAYER
LAYER_THERMAL_CONDUCTIVITY LAYER_THERMAL_CONDUCTIVITY
LAYER_THICKNESS LAYER_THICKNESS
LAYER_TYPE LAYER_TYPE
LAYER_LOSS_TANGENT
END END
# #
PAD_DEF PAD_DEF
PAD_NAME
REC_NUMBER
LAYER
FIXFLAG
VIAFLAG
PADSHAPE1
PADWIDTH
PADHGHT
PADXOFF
PADYOFF
PADFLASH
PADSHAPENAME
TRELSHAPE1
TRELWIDTH
TRELHGHT
TRELXOFF
TRELYOFF
TRELZOFF
TRELFLASH
TRELSHAPENAME
APADSHAPE1
APADWIDTH
APADHGHT
APADXOFF
APADYOFF
APADFLASH
APADSHAPENAME
END END
# #
COMPOSITE_PAD COMPOSITE_PAD
...@@ -165,5 +196,28 @@ NET ...@@ -165,5 +196,28 @@ NET
NET_MAX_PARALLEL NET_MAX_PARALLEL
NET_IMPEDANCE_AVERAGE NET_IMPEDANCE_AVERAGE
NO_TEST NO_TEST
NET_IMPEDANCE_MINIMUM
NET_IMPEDANCE_MAXIMUM
END
#
CONNECTIVITY
NET_NAME_SORT
NET_NAME
NODE_SORT
NODE_1_NUMBER
NODE_2_NUMBER
NODE_CONNECTS
RAT_CONNECTED
REFDES
PIN_NUMBER
PIN_TYPE
PIN_X
PIN_Y
VIA_X
VIA_Y
VIA_MIRROR
PAD_STACK_NAME
START_LAYER_NAME
END_LAYER_NAME
END END
# #
design_files/worklib/pc049a_toplevel/physical/signoise.log
View file @ f9bf008a
INFO: Loaded existing interconnect file '/projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/interconn.iml'
INFO: Loaded existing interconnect file '/software/CAD/Cadence/SPB16.60.000/share/pcb/signal/cds_interconn.iml'
INFO: Finished loading SigNoise interconnect libraries
design_files/worklib/pc049a_toplevel/physical/signoise.run/cases.cfg,1
View file @ f9bf008a
(SisCases (SisCases
(cases (cases
(case1 "Default Settings" ) ) ) (case1 "Default Settings" ) )
\ No newline at end of file (CurrentCase case1 ) )
\ No newline at end of file
design_files/worklib/pc049a_toplevel/physical/step_out.log
View file @ f9bf008a
...@@ -3,19 +3,19 @@ ...@@ -3,19 +3,19 @@
( STEP Export ) ( STEP Export )
( ) ( )
( Software Version : 16.6S014 ) ( Software Version : 16.6S014 )
( Date/Time : Fri Oct 10 14:14:37 2014 ) ( Date/Time : Mon Apr 13 14:34:18 2015 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
STEP file: pc049a_toplevel_40_a16-6 STEP file: pc049a_toplevel_52
Design file: /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_40_a16-6.brd Design file: /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_52.brd
Export units: Millimeter Export units: Millimeter
STEP protocol: AP-214 STEP protocol: AP-214
Source identification: allegro_16.6S014 Source identification: allegro_16.6S014
Export parts with mapped STEP Models?: YES Export parts with mapped STEP Models?: NO
Export parts without mapped STEP Models?: YES Export parts without mapped STEP Models?: YES
Export assemblies and enclosures parts?: NO Export assemblies and enclosures parts?: NO
Export mechincal drills?: YES Export mechincal drills?: YES
......
design_files/worklib/pc049a_toplevel/physical/techfile.log
View file @ f9bf008a
...@@ -3,13 +3,13 @@ ...@@ -3,13 +3,13 @@
( Technology File WRITE ) ( Technology File WRITE )
( ) ( )
( Drawing : pc049a_toplevel_52.brd ) ( Drawing : pc049a_toplevel_52.brd )
( Software Version : 16.6S014 ) ( Software Version : 16.6S037 )
( Date/Time : Wed Feb 25 10:22:14 2015 ) ( Date/Time : Mon Dec 14 12:14:40 2015 )
( ) ( )
(---------------------------------------------------------------------) (---------------------------------------------------------------------)
layout name: /projects/HEP_Instrumentation/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_52.brd layout name: Z:/cad/designs/uob-hep-pc049a/trunk/design_files/worklib/pc049a_toplevel/physical/pc049a_toplevel_52.brd
techfile name: tech_pc049a_toplevel_52.out techfile name: tech_pc049a_toplevel_52.out
......
firmware/scripts/MarocConfiguration.py
View file @ f9bf008a
...@@ -44,8 +44,8 @@ class MarocConfiguration(object): ...@@ -44,8 +44,8 @@ class MarocConfiguration(object):
self.logger.info("Read back %i from %s"%( int(regReadValue) , regName )) self.logger.info("Read back %i from %s"%( int(regReadValue) , regName ))
self.logger.debug( "Resetting timestamp and trigger counters") # self.logger.debug( "Resetting timestamp and trigger counters")
self.board.write("trigStatus",0x00000001) # self.board.write("trigStatus",0x00000001)
# Reset ADC buffer write buffer # # Reset ADC buffer write buffer
self.board.write("adc0Ctrl",0x00000002) # self.board.write("adc0Ctrl",0x00000002)
firmware/scripts/MarocDAQ.py
View file @ f9bf008a
...@@ -138,9 +138,15 @@ class MarocDAQ(object): ...@@ -138,9 +138,15 @@ class MarocDAQ(object):
def resetADCPointers(self): def resetADCPointers(self):
"""Resets read and write pointers. Hopefully doesn't reset event counter ....""" """Resets read and write pointers. Hopefully doesn't reset event counter ...."""
self.logger.info( "Resetting ADC data read and write pointers")
self.board.write("adc0Ctrl",0x00000002) self.board.write("adc0Ctrl",0x00000002)
self.adcReadPointer = self.numMaroc*[0] self.adcReadPointer = self.numMaroc*[0]
def resetCounters(self):
"""Reset timestamp and trigger counters"""
self.logger.info( "Resetting timestamp and trigger counters")
self.board.write("trigStatus",0x00000001)
def decodeADCData(self,adcEventData): def decodeADCData(self,adcEventData):
"""Takes data from a single ADC, unpacks it into 12-bit words, performs Gray coding and returns an array of 64-ADC values. """Takes data from a single ADC, unpacks it into 12-bit words, performs Gray coding and returns an array of 64-ADC values.
*** NB. This doesn't seem to work correctly at the moment ****""" *** NB. This doesn't seem to work correctly at the moment ****"""
......
firmware/scripts/MarocReadoutThread.py
View file @ f9bf008a
...@@ -50,6 +50,13 @@ class MarocReadoutThread(Thread): ...@@ -50,6 +50,13 @@ class MarocReadoutThread(Thread):
# Create pointer to MAROC board and set up structures. # Create pointer to MAROC board and set up structures.
marocData = MarocDAQ.MarocDAQ(board,debugLevel) marocData = MarocDAQ.MarocDAQ(board,debugLevel)
# BODGE - wait for histogram thread to book histograms.
time.sleep(5)
# Reset pointers
marocData.resetCounters()
marocData.resetADCPointers()
while not exitFlag: while not exitFlag:
# Read data from MAROC # Read data from MAROC
......
firmware/scripts/takeMarocData.py
View file @ f9bf008a
...@@ -24,8 +24,10 @@ from PyChipsUser import * ...@@ -24,8 +24,10 @@ from PyChipsUser import *
from Queue import Queue from Queue import Queue
#from multiprocessing import Queue #from multiprocessing import Queue
debugLevel = logging.INFO
logger = logging.getLogger(__name__) logger = logging.getLogger(__name__)
marocLogging(logger,logging.DEBUG) marocLogging(logger,debugLevel)
parser = OptionParser() parser = OptionParser()
parser.add_option("-i", dest = 'ipAddress' , default="192.168.200.16") parser.add_option("-i", dest = 'ipAddress' , default="192.168.200.16")
...@@ -55,8 +57,6 @@ firmwareID = board.read("FirmwareId") ...@@ -55,8 +57,6 @@ firmwareID = board.read("FirmwareId")
logger.info("Firmware ID = %s" % (hex(firmwareID))) logger.info("Firmware ID = %s" % (hex(firmwareID)))
debugLevel = logging.INFO
# Create object with configuration information - in the long run this should be done in a separate thread with a GUI # Create object with configuration information - in the long run this should be done in a separate thread with a GUI
marocConfiguration = MarocConfiguration.MarocConfiguration(board,configurationFile = options.configFile , debugLevel=debugLevel) marocConfiguration = MarocConfiguration.MarocConfiguration(board,configurationFile = options.configFile , debugLevel=debugLevel)
......
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