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Mock Turtle
Commit b3cdf20c authored by Dimitris Lampridis's avatar Dimitris Lampridis
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sw:firmware: Add extra rule to the MT build system to also produce "bram" outputs. 

"bram" files are used in order to produce FPGA bitstreams with the MT CPUs preprogrammed with their
firmware.
parent 7e633d50
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Showing with 9 additions and 2 deletions
software/firmware/Makefile
View file @ b3cdf20c
......@@ -9,6 +9,8 @@ TRTL ?= ../../
TRTL_SW ?= $(TRTL)/software
TRTL_HDL ?= $(TRTL)/hdl/rtl
GEN_CORES ?= $(TRTL)/hdl/ip_cores/general-cores
RT_GIT_VERSION = 0x$(shell git rev-parse --short=8 HEAD || echo "0") # empty if git is not there
# header file generated from the .config
AUTOCONF = $(CURDIR)/$(BUILDDIR)/include/generated/autoconf.h
......@@ -39,6 +41,8 @@ OBJCOPY = $(CROSS_COMPILE_TARGET)objcopy
SIZE = $(CROSS_COMPILE_TARGET)size
STRIP = $(CROSS_COMPILE_TARGET)strip
MEM_INIT_GEN = $(GEN_CORES)/tools/mem_init_gen.py
CFLAGS += -Wall -D__TRTL_FIRMWARE__ -DARCH=urv
CFLAGS += -I.
CFLAGS += -I$(BUILDDIR)/include
......@@ -80,7 +84,7 @@ MOCKTURTLE_LDSCRIPT ?= $(TRTL)/software/firmware/urv/mockturtle.ld
.PHONY: all clean cleanall check-def
all: $(OUTPUT).bin
all: $(build_output).bram $(build_output).bin $(build_output).elf
WBGEN_FILES = mt_cpu_csr.wb mt_cpu_lr.wb
WBGEN_HEADERS = mockturtle_cpu_csr.h mockturtle_cpu_lr.h
......@@ -119,6 +123,9 @@ $(OUTPUT).bin: $(OUTPUT).elf | check-def
${OBJCOPY} --remove-section .smem -O binary $(OUTPUT).elf $(OUTPUT).bin
$(SIZE) $(OUTPUT).elf
$(build_output).bram: $(build_output).bin
$(MEM_INIT_GEN) -i $(build_output).bin > $(build_output).bram
$(BUILDDIR)/urv/emulate.o: urv/emulate.c
${CC} $(DEPFLAGS) $(CFLAGS) -march=rv32i -c $< -o $@
$(POSTCOMPILE)
......@@ -132,7 +139,7 @@ $(BUILDDIR)/%.o: %.S
$(POSTCOMPILE)
clean:
rm -f $(OUTPUT).bin $(OUTPUT).elf
rm -f $(build_output).bram $(build_output).bin $(build_output).elf
rm -rf $(BUILDDIR)
clean-dot-config:
......
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