*DO NOTE THAT THIS REQUIRES WBGEN2 >= #6b6a3b7*

This modification is necessary for proper simulation. Without it, our register-reading functions return values with 'X'.

This can be a problem, because if these values are copied to another register (which is something that gcc does when returning from a function call, if optimization is not enabled), we will end up with a full 'X' value, for all bits. This is because in RISC-V, the mv command is implemented through an addi command with one operand being zero (and the other being our value with some of the bits being 'X').