New base state

6d2ecdde · Christopher Turner · 9ec3296c · 6d2ecdde
Commit 6d2ecdde authored Feb 17, 2017 by Christopher Turner
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Showing with 1 addition and 24 deletions

base.state base.state +1 -24

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--- a/base.state
+++ b/base.state
@@ -212,22 +212,7 @@ SRGATE1.RST=BITS.ZERO
 SRGATE2.RST=BITS.ZERO
 SRGATE3.RST=BITS.ZERO
 SRGATE4.RST=BITS.ZERO
-FMC.OUT_PWR_ON=Off
-FMC.OUT_FLTR=Off
-FMC.OUT_CONFIG=0
-FMC.OUT_EN=Disable
-FMC.IN_DB=None
-FMC.OUT_PUSHPL=High-side
-FMC.OUT_SRIAL=Parallel
-FMC.OUT3=BITS.ZERO
-FMC.OUT5=BITS.ZERO
-FMC.OUT4=BITS.ZERO
-FMC.OUT7=BITS.ZERO
-FMC.OUT6=BITS.ZERO
-FMC.OUT1=BITS.ZERO
-FMC.OUT2=BITS.ZERO
-FMC.IN_VTSEL=5V
-FMC.OUT8=BITS.ZERO
+FMC.LOOP_PERIOD=0
 LUT1.FUNC=0x00000000
 LUT2.FUNC=0x00000000
 LUT3.FUNC=0x00000000
@@ -567,14 +552,6 @@ SRGATE1.RST.DELAY=0
 SRGATE2.RST.DELAY=0
 SRGATE3.RST.DELAY=0
 SRGATE4.RST.DELAY=0
-FMC.OUT3.DELAY=0
-FMC.OUT5.DELAY=0
-FMC.OUT4.DELAY=0
-FMC.OUT7.DELAY=0
-FMC.OUT6.DELAY=0
-FMC.OUT1.DELAY=0
-FMC.OUT2.DELAY=0
-FMC.OUT8.DELAY=0
 LUT1.INPB.DELAY=0
 LUT2.INPB.DELAY=0
 LUT3.INPB.DELAY=0