Skip to content

P
PPSi
Commit 1af0725b authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
Browse files
Options

arch-wrpc: follow up wrpc-sw-v5 changes in the softpll API

parent 657874c8
Hide whitespace changes
Inline Side-by-side
Showing with 4 additions and 6 deletions
arch-wrpc/wrc_ptp_ppsi.c
View file @ 1af0725b
......@@ -133,7 +133,7 @@ int wrc_ptp_set_mode(int mode)
wrp->wrConfig = WR_M_ONLY;
ppi->role = PPSI_ROLE_MASTER;
*class_ptr = PP_CLASS_WR_GM_LOCKED;
spll_init(SPLL_MODE_GRAND_MASTER, 0, 1);
spll_init(SPLL_MODE_GRAND_MASTER, 0, SPLL_FLAG_ALIGN_PPS);
shw_pps_gen_unmask_output(1);
lock_timeout = LOCK_TIMEOUT_GM;
DSDEF(ppi)->clockQuality.clockClass = PP_CLASS_WR_GM_LOCKED;
......@@ -144,7 +144,7 @@ int wrc_ptp_set_mode(int mode)
wrp->wrConfig = WR_M_ONLY;
ppi->role = PPSI_ROLE_MASTER;
*class_ptr = PP_CLASS_DEFAULT;
spll_init(SPLL_MODE_FREE_RUNNING_MASTER, 0, 1);
spll_init(SPLL_MODE_FREE_RUNNING_MASTER, 0, SPLL_FLAG_ALIGN_PPS);
shw_pps_gen_unmask_output(1);
lock_timeout = LOCK_TIMEOUT_FM;
DSDEF(ppi)->clockQuality.clockClass = PP_CLASS_DEFAULT;
......@@ -155,7 +155,7 @@ int wrc_ptp_set_mode(int mode)
wrp->wrConfig = WR_S_ONLY;
ppi->role = PPSI_ROLE_SLAVE;
*class_ptr = PP_CLASS_SLAVE_ONLY;
spll_init(SPLL_MODE_SLAVE, 0, 1);
//spll_init(SPLL_MODE_SLAVE, 0, SPLL_FLAG_ALIGN_PPS);
shw_pps_gen_unmask_output(0);
break;
}
......@@ -215,7 +215,6 @@ int wrc_ptp_start()
{
struct pp_instance *ppi = &ppi_static;
pp_printf("PTP start\n");
pp_init_globals(&ppg_static, &__pp_default_rt_opts);
/* Call the state machine. Being it in "Initializing" state, make
......@@ -235,7 +234,6 @@ int wrc_ptp_stop()
struct pp_instance *ppi = &ppi_static;
struct wr_dsport *wrp = WR_DSPOR(ppi);
pp_printf("PTP stop\n");
wrp->ops->enable_timing_output(ppi, 0);
/* Moving fiber: forget about this parent (FIXME: shouldn't be here) */
wrp->parentWrConfig = wrp->parentWrModeOn = 0;
......
arch-wrpc/wrpc-spll.c
View file @ 1af0725b
......@@ -17,7 +17,7 @@ extern uint32_t cal_phase_transition;
int wrpc_spll_locking_enable(struct pp_instance *ppi)
{
spll_init(SPLL_MODE_SLAVE, 0, 1);
spll_init(SPLL_MODE_SLAVE, 0, SPLL_FLAG_ALIGN_PPS);
spll_enable_ptracker(0, 1);
rxts_calibration_start();
return WR_SPLL_OK;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment