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40691583
Commit
40691583
authored
Mar 21, 2012
by
Grzegorz Daniluk
Committed by
Alessandro Rubini
Mar 28, 2012
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Plain Diff
spec: use syscon instead of old gpio and timer
parent
43ad3275
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4 changed files
with
207 additions
and
52 deletions
+207
-52
syscon.c
arch-spec/dev/syscon.c
+17
-9
gpio.h
arch-spec/include/gpio.h
+0
-43
wrc_syscon_regs.h
arch-spec/include/hw/wrc_syscon_regs.h
+129
-0
syscon.h
arch-spec/include/syscon.h
+61
-0
No files found.
arch-spec/dev/
timer
.c
→
arch-spec/dev/
syscon
.c
View file @
40691583
#include "syscon.h"
/*
* Alessandro Rubini for CERN, 2011 -- GNU LGPL v2.1 or later
* based on code by Tomasz Wlostowski
*/
#include <pptp/pptp.h>
#include "../spec.h"
struct
s_i2c_if
i2c_if
[
2
]
=
{
{
SYSC_GPSR_FMC_SCL
,
SYSC_GPSR_FMC_SDA
},
{
SYSC_GPSR_SFP_SCL
,
SYSC_GPSR_SFP_SDA
}
};
/****************************
* TIMER
***************************/
void
timer_init
(
uint32_t
enable
)
{
if
(
enable
)
syscon
->
TCR
|=
SYSC_TCR_ENABLE
;
else
syscon
->
TCR
&=
~
SYSC_TCR_ENABLE
;
}
static
uint32_t
timer_get_tics
(
void
)
uint32_t
timer_get_tics
(
)
{
return
*
(
volatile
uint32_t
*
)
BASE_TIME
R
;
return
syscon
->
TV
R
;
}
void
spec_udelay
(
int
usecs
)
{
uint32_t
start
,
end
;
timer_init
(
1
);
start
=
timer_get_tics
();
/* It looks like the counter counts millisecs */
end
=
start
+
(
usecs
+
500
)
/
1000
;
...
...
arch-spec/include/gpio.h
deleted
100644 → 0
View file @
43ad3275
/*
* Copyright 2011 Tomasz Wlostowski <tomasz.wlostowski@cern.ch> for CERN
* Modified by Alessandro Rubini for ptp-proposal/proto
*
* GNU LGPL 2.1 or later versions
*/
#ifndef __GPIO_H
#define __GPIO_H
#include <stdint.h>
struct
GPIO_WB
{
uint32_t
CODR
;
/*Clear output register*/
uint32_t
SODR
;
/*Set output register*/
uint32_t
DDR
;
/*Data direction register (1 means out)*/
uint32_t
PSR
;
/*Pin state register*/
};
static
volatile
struct
GPIO_WB
*
__gpio
=
(
volatile
struct
GPIO_WB
*
)
BASE_GPIO
;
static
inline
void
gpio_out
(
int
pin
,
int
val
)
{
if
(
val
)
__gpio
->
SODR
=
(
1
<<
pin
);
else
__gpio
->
CODR
=
(
1
<<
pin
);
}
static
inline
void
gpio_dir
(
int
pin
,
int
val
)
{
if
(
val
)
__gpio
->
DDR
|=
(
1
<<
pin
);
else
__gpio
->
DDR
&=
~
(
1
<<
pin
);
}
static
inline
int
gpio_in
(
int
pin
)
{
return
__gpio
->
PSR
&
(
1
<<
pin
)
?
1
:
0
;
}
#endif
arch-spec/include/hw/wrc_syscon_regs.h
0 → 100644
View file @
40691583
/*
Register definitions for slave core: WR Core System Controller
* File : wrc_syscon_regs.h
* Author : auto-generated by wbgen2 from wrc_syscon_wb.wb
* Created : Fri Feb 17 10:20:14 2012
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrc_syscon_wb.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WRC_SYSCON_WB_WB
#define __WBGEN2_REGDEFS_WRC_SYSCON_WB_WB
#include <inttypes.h>
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: Syscon reset register */
/* definitions for field: Reset trigger in reg: Syscon reset register */
#define SYSC_RSTR_TRIG_MASK WBGEN2_GEN_MASK(0, 28)
#define SYSC_RSTR_TRIG_SHIFT 0
#define SYSC_RSTR_TRIG_W(value) WBGEN2_GEN_WRITE(value, 0, 28)
#define SYSC_RSTR_TRIG_R(reg) WBGEN2_GEN_READ(reg, 0, 28)
/* definitions for field: Reset line state value in reg: Syscon reset register */
#define SYSC_RSTR_RST WBGEN2_GEN_MASK(28, 1)
/* definitions for register: GPIO Set/Readback Register */
/* definitions for field: Status LED in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_LED_STAT WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Link LED in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_LED_LINK WBGEN2_GEN_MASK(1, 1)
/* definitions for field: FMC I2C bitbanged SCL in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_FMC_SCL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_FMC_SDA WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Network AP reset in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_NET_RST WBGEN2_GEN_MASK(4, 1)
/* definitions for field: SPEC Pushbutton 1 state in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_BTN1 WBGEN2_GEN_MASK(5, 1)
/* definitions for field: SPEC Pushbutton 2 state in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_BTN2 WBGEN2_GEN_MASK(6, 1)
/* definitions for field: SFP detect (MOD_DEF0 signal) in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_SFP_DET WBGEN2_GEN_MASK(7, 1)
/* definitions for field: SFP I2C bitbanged SCL in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_SFP_SCL WBGEN2_GEN_MASK(8, 1)
/* definitions for field: SFP I2C bitbanged SDA in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_SFP_SDA WBGEN2_GEN_MASK(9, 1)
/* definitions for register: GPIO Clear Register */
/* definitions for field: Status LED in reg: GPIO Clear Register */
#define SYSC_GPCR_LED_STAT WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Link LED in reg: GPIO Clear Register */
#define SYSC_GPCR_LED_LINK WBGEN2_GEN_MASK(1, 1)
/* definitions for field: FMC I2C bitbanged SCL in reg: GPIO Clear Register */
#define SYSC_GPCR_FMC_SCL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Clear Register */
#define SYSC_GPCR_FMC_SDA WBGEN2_GEN_MASK(3, 1)
/* definitions for field: SFP I2C bitbanged SCL in reg: GPIO Clear Register */
#define SYSC_GPCR_SFP_SCL WBGEN2_GEN_MASK(8, 1)
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Clear Register */
#define SYSC_GPCR_SFP_SDA WBGEN2_GEN_MASK(9, 1)
/* definitions for register: Hardware Feature Register */
/* definitions for field: Memory size in reg: Hardware Feature Register */
#define SYSC_HWFR_MEMSIZE_MASK WBGEN2_GEN_MASK(0, 4)
#define SYSC_HWFR_MEMSIZE_SHIFT 0
#define SYSC_HWFR_MEMSIZE_W(value) WBGEN2_GEN_WRITE(value, 0, 4)
#define SYSC_HWFR_MEMSIZE_R(reg) WBGEN2_GEN_READ(reg, 0, 4)
/* definitions for register: Timer Control Register */
/* definitions for field: Timer Divider in reg: Timer Control Register */
#define SYSC_TCR_TDIV_MASK WBGEN2_GEN_MASK(0, 12)
#define SYSC_TCR_TDIV_SHIFT 0
#define SYSC_TCR_TDIV_W(value) WBGEN2_GEN_WRITE(value, 0, 12)
#define SYSC_TCR_TDIV_R(reg) WBGEN2_GEN_READ(reg, 0, 12)
/* definitions for field: Timer Enable in reg: Timer Control Register */
#define SYSC_TCR_ENABLE WBGEN2_GEN_MASK(31, 1)
/* definitions for register: Timer Counter Value Register */
/* [0x0]: REG Syscon reset register */
#define SYSC_REG_RSTR 0x00000000
/* [0x4]: REG GPIO Set/Readback Register */
#define SYSC_REG_GPSR 0x00000004
/* [0x8]: REG GPIO Clear Register */
#define SYSC_REG_GPCR 0x00000008
/* [0xc]: REG Hardware Feature Register */
#define SYSC_REG_HWFR 0x0000000c
/* [0x10]: REG Timer Control Register */
#define SYSC_REG_TCR 0x00000010
/* [0x14]: REG Timer Counter Value Register */
#define SYSC_REG_TVR 0x00000014
#endif
arch-spec/include/syscon.h
0 → 100644
View file @
40691583
#ifndef __SYSCON_H
#define __SYSCON_H
#include <inttypes.h>
#include "../spec.h"
#include <hw/wrc_syscon_regs.h>
struct
SYSCON_WB
{
uint32_t
RSTR
;
/*Syscon Reset Register*/
uint32_t
GPSR
;
/*GPIO Set/Readback Register*/
uint32_t
GPCR
;
/*GPIO Clear Register*/
uint32_t
HWFR
;
/*Hardware Feature Register*/
uint32_t
TCR
;
/*Timer Control Register*/
uint32_t
TVR
;
/*Timer Counter Value Register*/
};
/*GPIO pins*/
#define GPIO_LED_LINK SYSC_GPSR_LED_LINK
#define GPIO_LED_STAT SYSC_GPSR_LED_STAT
#define GPIO_BTN1 SYSC_GPSR_BTN1
#define GPIO_BTN2 SYSC_GPSR_BTN2
#define GPIO_SFP_DET SYSC_GPSR_SFP_DET
#define WRPC_FMC_I2C 0
#define WRPC_SFP_I2C 1
struct
s_i2c_if
{
uint32_t
scl
;
uint32_t
sda
;
};
extern
struct
s_i2c_if
i2c_if
[
2
];
void
timer_init
(
uint32_t
enable
);
uint32_t
timer_get_tics
();
void
spec_udelay
(
int
usec
);
int
spec_time
(
void
);
static
volatile
struct
SYSCON_WB
*
syscon
=
(
volatile
struct
SYSCON_WB
*
)
BASE_SYSCON
;
/****************************
* GPIO
***************************/
static
inline
void
gpio_out
(
int
pin
,
int
val
)
{
if
(
val
)
syscon
->
GPSR
=
pin
;
else
syscon
->
GPCR
=
pin
;
}
static
inline
int
gpio_in
(
int
pin
)
{
return
syscon
->
GPSR
&
pin
?
1
:
0
;
}
#endif
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