As specified in the standard, the domain number must be in the range
[0,127]. The range [128-255] is reserved.

A master in P2P was responding to a Delay request message. A check for
the delay mechanism has been introduced to fix this issue.

This value should return to 1 when the new standard will be published
and HA released

In the new HAL version supporting LPDC, HAL set the timing mode to FR
and it must not be changed during all the calibration phase. So PPSI
needs to wait the end of the calibration before to change the timing
mode to GM if it is needed.
Also PPSi waits the end of HAL calibration before to consider a link up
on any port.

This new state is used by PPSi the end of the initialization of all
ports before starting to change the timing mode. This is particularly
the case for the GM mode which is set during the initialization of PPSi.

- Update the local definition of the HAL share memory
- Hide some structure specific to HAL like LPDC support

This is mainly to have wr_mon display correctly info about
extensin (whether it's active or not)

The port left led should indicate when the port is non-WR/HA.
This was not the case as a non WR/HA port in Master/Slave
state would still indicate WR link (should be "other").
This was corrected

After around 36 hours, one PPS was missing. This was due to an issue in
the WR extension. When the sequence id in the announce message was
moving from 65535 to 0, the WR handshake was restarted. As a result of
that, the side effects would be :
- a missing PPS
- an unlock of the PLL

The HAL states and the HAL share memory have changed. PPSi must follow
these modifications.

Just comments, no code changes.

Due to C library changes the tai field is now available in the structure
timex,

- Problem was coming from the interval to pico conversion when  the
interval is negative.
- fix also issue in wrs_ajust_in_progress

As HA profile, the WR profile must always have the  asymmetryCorrection
enabled.

When the extension is inactive due to some circonstances, an instance
will reactivate the extension when the instance will jump to
UNCALIBRATED state.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

In the previous code all these values where hardcoded and thus difficult
to port to a device similar to wrs without needing to fully rewrite the
wrs-time.c. With this new code the user can now modify the device to
access to FPGA and the offset of RT subsystem.

Also ignore generated size_wrs_info.txt

For security we still use define in the case that the hal as not
properly set these value.

When the link state changes rapidly, it can't be detected by PPSi. This
is the case with the BTrain configuration. So we must detect that the
peer has changed and restart the servo for a slave and use the right
protocol (extension/ptp).

The structure was not updated when the FAULT timer was removed.

At startup the state of a instance is set to DISABLED and will be set
if the link is up to INITIALIZING. This is done to be coherent with the
curent behavior: the state becomes DISABLED when the link is down

The WR time is set in GM mode as follow :
1/ At startup the NTP time is set using wr_date script
2/ PPSi calls the tool wr_date with parameters "set host". It will be
called every time it detects a PLL transition from UNLOCKED to LOCKED
state. Also PPSi provide a error counter 'gmUnlockErr' which gives the
number of time the PLL unlocked.
3/ Parameters "-v set host" in wr_date tool, set only the second part of
the WR time. The time is set in a middle of two WR seconds ticks.

- Give priority to the time-out and not the number of msg repetitions
- Call also wr_handshake_fail() function when a time-out is detected.

As the enable_output_timing() hook  is called also in the standard PTP
part, the hook has been moved from the WR specific structure
wrh_operations to  pp_time_operations

- Add a new state machine available for all timing modes ( Free running
master, Grand master and boundary clock)
- State is stored in pp_globals, field timingModeLockingState
- The 3 main states are :
-- Locking: Waiting for PLL locked
-- Locked: PLL is locked
-- Error: PLL is unlocked but was locked before
- Changing the timing mode will reset the state to 'Locking'

- Change the Quality structure to make it compliant with the standard
- Fix network to host conversion to display offsetScaledLogVariance