Commit 3af16a43 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

softpll: track only lower half of the ports (speed reasons, FIXME), added…

softpll: track only lower half of the ports (speed reasons, FIXME), added shifter busy call, fixed PPS output enable in GM/FreeMaster modes
parent 9009247d
......@@ -111,7 +111,7 @@ void _irq_entry()
if(softpll.mode == SPLL_MODE_SLAVE)
softpll.seq_state = SEQ_START_MAIN;
else {
for(i=0;i<n_chan_ref; i++)
for(i=0;i<n_chan_ref/2; i++)
ptracker_start((struct spll_ptracker_state *) &s->ptrackers[i]);
softpll.seq_state = SEQ_READY;
}
......@@ -128,7 +128,7 @@ void _irq_entry()
{
softpll.seq_state = SEQ_READY;
for(i=0;i<n_chan_ref; i++)
for(i=0;i<n_chan_ref/2; i++)
ptracker_start((struct spll_ptracker_state *) &s->ptrackers[i]);
}
break;
......@@ -174,7 +174,7 @@ void _irq_entry()
if(softpll.mode == SPLL_MODE_SLAVE)
mpll_update((struct spll_main_state *) &s->mpll, tag, src);
for(i=0;i<n_chan_ref; i++)
for(i=0;i<n_chan_ref/2; i++)
ptracker_update((struct spll_ptracker_state *) &s->ptrackers[i], tag, src);
break;
......@@ -238,8 +238,14 @@ void spll_init(int mode, int slave_ref_channel, int align_pps)
strcpy(mode_str, "Grand Master");
softpll.seq_state = SEQ_CLEAR_DACS;
external_init(&softpll.ext, n_chan_ref + n_chan_out, align_pps);
helper_init(&softpll.helper, n_chan_ref);
mpll_init(&softpll.mpll, slave_ref_channel, n_chan_ref);
for(i=0;i<n_chan_out-1;i++)
mpll_init(&softpll.aux[i], slave_ref_channel, n_chan_ref + i + 1);
break;
case SPLL_MODE_FREE_RUNNING_MASTER:
......@@ -249,8 +255,12 @@ void spll_init(int mode, int slave_ref_channel, int align_pps)
softpll.default_dac_main = 32000;
helper_init(&softpll.helper, n_chan_ref);
PPSG->ESCR = PPSG_ESCR_PPS_VALID | PPSG_ESCR_TM_VALID;
mpll_init(&softpll.mpll, slave_ref_channel, n_chan_ref);
for(i=0;i<n_chan_out-1;i++)
mpll_init(&softpll.aux[i], slave_ref_channel, n_chan_ref + i + 1);
PPSG->ESCR = PPSG_ESCR_PPS_VALID | PPSG_ESCR_TM_VALID;
break;
case SPLL_MODE_SLAVE:
......@@ -262,6 +272,9 @@ void spll_init(int mode, int slave_ref_channel, int align_pps)
for(i=0;i<n_chan_out-1;i++)
mpll_init(&softpll.aux[i], slave_ref_channel, n_chan_ref + i + 1);
// PPSG->ESCR = PPSG_ESCR_PPS_VALID | PPSG_ESCR_TM_VALID;
break;
}
......@@ -377,3 +390,11 @@ void spll_show_stats()
softpll.helper.pi.y, softpll.mpll.pi.y);
}
int spll_shifter_busy(int channel)
{
if(!channel)
return mpll_shifter_busy(&softpll.mpll);
else
return mpll_shifter_busy(&softpll.aux[channel-1]);
}
\ No newline at end of file
......@@ -20,6 +20,7 @@ void spll_set_phase_shift(int channel, int32_t value_picoseconds);
void spll_get_phase_shift(int channel, int32_t *current, int32_t *target);
int spll_read_ptracker(int channel, int32_t *phase_ps);
void spll_get_num_channels(int *n_ref, int *n_out);
int spll_shifter_busy(int channel);
#endif
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