PZ-TIO
Project description
The PZ-TIO is an input/output carrier board for a Zynq System on Module (SoM), Model Avnet PicoZed 7015. In the Zynq's firmware (PL) we implemented the White Rabbit IP core, the Xillybus Lite core for I/O with the Zynq's ARM processor, and some simple logic to route and count input and output signals. The ARM processor (PS) runs full Ubuntu 18. It connects to the PicoZed's on-board 1GB of memory and 4GB of eMMC; and the PZ-TIO adds circuitry for Ethernet, UART, SD card, and USB peripherals. An alternate Ethernet PHY can provide PTP hardware timestamping for Linux.
The PZ-TIO carrier board connects the PL to ~40 GPIO lines with various connectors and 3 SFP interface ports. Two of the SFP interfaces are capable of 1 Gbps Ethernet with White Rabbit time synchronization, when using replaceable daughterboards for the White Rabbit clocking circuitry.
There is not much functionality implemented in the PL, but it can blink lights or toggle IO lines core synchronous with a White Rabbit master clock (to sub-nanosecond precision!), and may serve as a serve as a WR hardware/firmware implementation example for a low-cost Zynq.
PZ-TIO board top and bottom, clock daughtercard installed on bottom. The PicoZed plugs into the 3 high density connectors on the top as shown here
Main Features
- Input/output carrier board for a Zynq System on Module (SoM), Model Avnet PicoZed 7015
- Connects the PL to ~40 GPIO lines with various connectors and 3 SFP interface ports
- Ethernet, UART, SD card, and USB peripherals
- Two of the SFP interfaces are capable of 1 Gbps Ethernet with White Rabbit time synchronization (using replaceable daughterboards for the White Rabbit clocking circuitry)
Project information
- Official production documentation: PZTIO_Manual.pdf
- Carrier board schematic: pdf hw-schematic.pdf, Altium hw-schematic-03312022.zip
- Linux demo SW to communicate with WR core (e.g. read time, set a "start time" for a trigger signal) sw-arm-04042022.zip
- Vivado project (includes creation script and WR IP core 4.2)fw-zynq-03302022.zip
- Zynq bootfiles (end product of Vivado, plus boot loader and Linux kernel) sd-bootfiles-03302022.zip
- SD card image with bootfiles and Linux OS can be downloaded from here. This is a Windows zip file, needs to be extraced and written to a 8+ GB SD card with an image writer
- WR clocking daughterboard schematic and layout (derived from various White Rabbit reference designs): pdf hw-wrclkdb.pdf, Altiumhw-wrclkdb-03312022.zip
- Users
- Frequently Asked Questions
Contacts
General questions about project
- Wolfgang Hennig - XIA LLC
Commercial producers
Status
Date | Event |
---|---|
01-10-2021 | Design start |
29-03-2022 | Project added to ohwr.org |
31 March 2022