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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Commits
24a9111d
Commit
24a9111d
authored
Jul 12, 2019
by
Dimitris Lampridis
Committed by
Tristan Gingold
Jul 15, 2019
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expose DDR WR FIFO empty flag
parent
6d10688e
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4 additions
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+4
-1
spec_template_wr.vhd
hdl/rtl/spec_template_wr.vhd
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hdl/rtl/spec_template_wr.vhd
View file @
24a9111d
...
...
@@ -226,6 +226,9 @@ entity spec_template_wr is
ddr_dma_wb_i
:
in
t_wishbone_slave_data64_in
;
ddr_dma_wb_o
:
out
t_wishbone_slave_data64_out
;
-- DDR FIFO empty flag
ddr_wr_fifo_empty_o
:
out
std_logic
;
-- Clocks and reset.
clk_sys_62m5_o
:
out
std_logic
;
rst_sys_62m5_n_o
:
out
std_logic
;
...
...
@@ -931,7 +934,7 @@ begin -- architecture top
p0_rd_overflow_o
=>
open
,
p0_rd_error_o
=>
open
,
p0_wr_full_o
=>
open
,
p0_wr_empty_o
=>
open
,
p0_wr_empty_o
=>
ddr_wr_fifo_empty_o
,
p0_wr_count_o
=>
open
,
p0_wr_underrun_o
=>
open
,
p0_wr_error_o
=>
open
,
...
...
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