[hdl] remove self-refresh timing constraint from DDR, feature not enabled

Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>

[hdl] remove self-refresh timing constraint from DDR, feature not enabled
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
266a209c · Dimitris Lampridis · 94946d75 · 266a209c
Commit 266a209c authored Mar 04, 2020 by Dimitris Lampridis
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spec_base_ddr3.ucf hdl/syn/common/spec_base_ddr3.ucf +0 -1

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--- a/hdl/syn/common/spec_base_ddr3.ucf
+++ b/hdl/syn/common/spec_base_ddr3.ucf
@@ -84,7 +84,6 @@ NET "ddr_udqs_n_b" IN_TERM = NONE;
 NET "inst_spec_base/*cmp_ddr_ctrl_bank?/*/c?_pll_lock"                                     TIG;
 NET "inst_spec_base/*cmp_ddr_ctrl_bank?/*/memc?_mcb_raw_wrapper_inst/selfrefresh_mcb_mode" TIG;
 NET "inst_spec_base/*cmp_ddr_ctrl_bank?/*/mcb_soft_calibration_inst/DONE_SOFTANDHARD_CAL"  TIG;
-NET "inst_spec_base/*cmp_ddr_ctrl_bank?/*/mcb_soft_calibration_inst/SELFREFRESH_MCB_REQ"   TIG;

 # Ignore async reset to DDR controller
 NET "inst_spec_base/ddr_rst" TPTHRU = ddr_rst;