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Tomasz Wlostowski authored
spec_base_wr: disable DDR3 controller g_CALIB_SOFT_IP when running a simulation. Greatly speeds up DDR initialization process
cbe5c7ee
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Manifest.py | ||
spec_base_regs.cheby | ||
spec_base_regs.vhd | ||
spec_base_wr.vhd |