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SPEC7
Commit 019b6fd3 authored by Peter Jansweijer's avatar Peter Jansweijer
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Set project properties for Virgo Demonstrator (default SPEC7 v3 and Morion… 

Set project properties for Virgo Demonstrator (default SPEC7 v3 and Morion Negative Tune Slope for the time being)
parent 0923aa5e
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Showing with 4 additions and 4 deletions
hdl/syn/spec7_ref_design/proj_properties.tcl
View file @ 019b6fd3
......@@ -11,8 +11,8 @@
set version ""
# Reference Design (using fmc-dio-5chttla => https://ohwr.org/project/fmc-dio-5chttla/wikis/home)
# HPSEC Design (using Bulls-Eye connector)
set spec7_design spec7_ref_top
#set spec7_design spec7_hpsec_top
#set spec7_design spec7_ref_top
set spec7_design spec7_hpsec_top
# Uncomment the line below for older SPEC7v2
#set version "_v2"
# ====================================================
......@@ -39,14 +39,14 @@ set pps_in "single"
# SELECT REFERENCE OSCILATOR TUNE SLOPE (DEFAULT TRUE):
# ====================================================
# Uncomment the line below when the reference oscillator has negative tune slope.
#set refclk_tune_pos_slope FALSE
set refclk_tune_pos_slope FALSE
# ====================================================
# ====================================================
# ENABLE IRIG_B OUTPUT (DEFAULT FALSE):
# ====================================================
# Uncomment the line below to enable IRIG_B on LA32
#set irig_b_enable TRUE
set irig_b_enable TRUE
# ====================================================
# Translate True/False into boolean values 1'b1, 1'b0, that are accepted by Vivado
......
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