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SPEC7
Commits
e284ea80
Commit
e284ea80
authored
Jan 21, 2022
by
Peter Jansweijer
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enable (older) version build selection
parent
5d6a0916
Pipeline
#3243
failed with stage
in 2 minutes and 6 seconds
Changes
3
Pipelines
2
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3 changed files
with
185 additions
and
182 deletions
+185
-182
proj_properties.tcl
hdl/syn/spec7_ref_design/proj_properties.tcl
+3
-0
spec7_wr_ref_top.vhd
hdl/top/spec7_ref_design/spec7_wr_ref_top.vhd
+177
-177
viv_do_all.tcl
sw/scripts/viv_do_all.tcl
+5
-5
No files found.
hdl/syn/spec7_ref_design/proj_properties.tcl
View file @
e284ea80
...
...
@@ -8,10 +8,13 @@
# ====================================================
# SELECT DESIGN TO BUILD:
# ====================================================
set
version
""
# Reference Design (using fmc-dio-5chttla => https://ohwr.org/project/fmc-dio-5chttla/wikis/home
)
# HPSEC Design (using Bulls-Eye connector
)
set
spec7_design spec7_ref_top
#set spec7_design spec7_hpsec_top
# Uncomment the line below for older SPEC7v2
#set version "_v2"
# ====================================================
# ====================================================
...
...
hdl/top/spec7_ref_design/spec7_wr_ref_top.vhd
View file @
e284ea80
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sw/scripts/viv_do_all.tcl
View file @
e284ea80
...
...
@@ -141,11 +141,11 @@ foreach line $content {
if
{[
info
exists spec7_design
]}
{
if
{
$spec7
_design ==
"spec7_ref_top"
}
{
puts
"use spec7_wr_ref_top.xdc"
read_xdc -verbose ../../top/spec7_ref_design/spec7_wr_ref_top.xdc
puts
"use spec7_wr_ref_top
${version}
.xdc"
read_xdc -verbose ../../top/spec7_ref_design/spec7_wr_ref_top
$
{
version
}
.xdc
}
else
if
{
$spec7
_design ==
"spec7_hpsec_top"
}
{
puts
"use spec7_wr_hpsec_top.xdc"
read_xdc -verbose ../../top/spec7_ref_design/spec7_wr_hpsec_top.xdc
puts
"use spec7_wr_hpsec_top
${version}
.xdc"
read_xdc -verbose ../../top/spec7_ref_design/spec7_wr_hpsec_top
$
{
version
}
.xdc
}
}
...
...
@@ -175,7 +175,7 @@ close_design
# Generate a new name for .bit, .mmi and xsa file and copy to project directory.
# Also create a copy of these files in the work directory that can be picked up by .gitlab-ci.yml
# Create a senible name including date and time
set bitfile_name
${spec7_design}
_
[
string
range
$device
3 6
]
_
[
clock
format
[
clock
seconds
]
-format %y%m%d_%H%M
]
set bitfile_name
${spec7_design}
${version}
_
[
string
range
$device
3 6
]
_
[
clock
format
[
clock
seconds
]
-format %y%m%d_%H%M
]
file copy ./work/$
{
proj_name
}
.runs/impl_1/$
{
proj_name
}
.bit ../$
{
bitfile_name
}
.bit
file copy ./work/$
{
proj_name
}
.runs/impl_1/$
{
proj_name
}
.bit ./work/$
{
bitfile_name
}
.bit
if
[
file
exists ./$
{
proj_name
}
.mmi
]
{
...
...
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