Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
S
Simple VME FMC Carrier SVEC - Software
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Simple VME FMC Carrier SVEC - Software
Commits
372604f0
Commit
372604f0
authored
Nov 22, 2013
by
Tomasz Wlostowski
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
kernel: prevent writing to CSR space of an unprogrammed AFPGA
parent
c600af76
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
16 additions
and
0 deletions
+16
-0
svec-drv.c
kernel/svec-drv.c
+15
-0
svec.h
kernel/svec.h
+1
-0
No files found.
kernel/svec-drv.c
View file @
372604f0
...
...
@@ -261,6 +261,8 @@ int svec_load_fpga(struct svec_dev *svec, const void *blob, int size)
u64
timeout
;
int
rv
=
0
;
clear_bit
(
SVEC_FLAG_AFPGA_PROGRAMMED
,
&
svec
->
flags
);
/* Hash firmware bitstream */
fw_hash
=
jhash
(
blob
,
size
,
0
);
if
(
fw_hash
==
svec
->
fw_hash
)
{
...
...
@@ -268,6 +270,8 @@ int svec_load_fpga(struct svec_dev *svec, const void *blob, int size)
dev_info
(
svec
->
dev
,
"card already programmed with bitstream with hash 0x%x
\n
"
,
fw_hash
);
set_bit
(
SVEC_FLAG_AFPGA_PROGRAMMED
,
&
svec
->
flags
);
return
0
;
}
...
...
@@ -343,6 +347,11 @@ int svec_load_fpga(struct svec_dev *svec, const void *blob, int size)
/* give the VME bus control to App FPGA */
iowrite32
(
cpu_to_be32
(
XLDR_CSR_EXIT
),
loader_addr
+
XLDR_REG_CSR
);
/* give the VME core a little while to settle up */
msleep
(
10
);
set_bit
(
SVEC_FLAG_AFPGA_PROGRAMMED
,
&
svec
->
flags
);
/* after a successful reprogram, save the hash so that the future call can
return earlier if requested to load the same bitstream */
svec
->
fw_hash
=
fw_hash
;
...
...
@@ -444,6 +453,10 @@ int svec_setup_csr(struct svec_dev *svec)
void
*
base
;
u8
ader
[
2
][
4
];
/* FUN0/1 ADER contents */
/* don't try to set up CSRs of an empty AFPGA */
if
(
!
test_bit
(
SVEC_FLAG_AFPGA_PROGRAMMED
,
&
svec
->
flags
))
return
0
;
if
(
!
svec
->
map
[
MAP_CR_CSR
])
rv
=
svec_map_window
(
svec
,
MAP_CR_CSR
);
...
...
@@ -649,6 +662,8 @@ int svec_load_golden(struct svec_dev *svec)
if
(
error
)
return
error
;
set_bit
(
SVEC_FLAG_AFPGA_PROGRAMMED
,
&
svec
->
flags
);
error
=
svec_setup_csr
(
svec
);
if
(
error
)
return
error
;
...
...
kernel/svec.h
View file @
372604f0
...
...
@@ -56,6 +56,7 @@ struct svec_config {
#define SVEC_FLAG_FMCS_REGISTERED 0
#define SVEC_FLAG_IRQS_REQUESTED 1
#define SVEC_FLAG_BOOTLOADER_ACTIVE 2
#define SVEC_FLAG_AFPGA_PROGRAMMED 3
/* Our device structure */
struct
svec_dev
{
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment