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Simple VME FMC Carrier SVEC
Commits
35fd11e5
Commit
35fd11e5
authored
Dec 16, 2019
by
Federico Vaga
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Merge branch 'release/v1.4.5'
parents
8ba33d1f
52d631c9
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Showing
5 changed files
with
37 additions
and
32 deletions
+37
-32
CHANGELOG.rst
CHANGELOG.rst
+6
-0
Makefile
software/kernel/Makefile
+1
-1
svec-compat.c
software/kernel/svec-compat.c
+2
-1
svec-core-fpga.c
software/kernel/svec-core-fpga.c
+19
-12
svec-core.c
software/kernel/svec-core.c
+9
-18
No files found.
CHANGELOG.rst
View file @
35fd11e5
...
...
@@ -2,6 +2,12 @@
Change Log
==========
[1.4.5] 2019-12-16
==================
Fixed
-----
- [sw] suggested fixed reported by checkpatch and coccicheck
[1.4.4] 2019-12-13
==================
Fixed
...
...
software/kernel/Makefile
View file @
35fd11e5
...
...
@@ -33,7 +33,7 @@ clean-spec-core-fpga.h:
install
:
modules_install
clean
:
clean-spec-core-fpga.h
modules help coccichek modules_install
:
svec-core-fpga.h
modules help cocciche
c
k modules_install
:
svec-core-fpga.h
$(MAKE)
-C
$(LINUX)
M
=
$(
shell
pwd
)
\
VERSION
=
$(VERSION)
\
VMEBRIDGE_ABS
=
$(VMEBRIDGE_ABS)
\
...
...
software/kernel/svec-compat.c
View file @
35fd11e5
...
...
@@ -56,7 +56,8 @@ struct fpga_manager *fpga_mgr_get(struct device *dev)
struct
class
*
fpga_mgr_class
=
(
struct
class
*
)
kallsyms_lookup_name
(
"fpga_mgr_class"
);
struct
device
*
mgr_dev
;
mgr_dev
=
class_find_device
(
fpga_mgr_class
,
NULL
,
dev
,
fpga_mgr_dev_match
);
mgr_dev
=
class_find_device
(
fpga_mgr_class
,
NULL
,
dev
,
fpga_mgr_dev_match
);
if
(
!
mgr_dev
)
return
ERR_PTR
(
-
ENODEV
);
...
...
software/kernel/svec-core-fpga.c
View file @
35fd11e5
...
...
@@ -83,7 +83,7 @@ static int svec_fpga_dbg_bld_info(struct seq_file *s, void *offset)
}
for
(
off
=
SVEC_BASE_REGS_BUILDINFO
;
off
<
SVEC_BASE_REGS_BUILDINFO
+
SVEC_BASE_REGS_BUILDINFO_SIZE
-
1
;
off
<
SVEC_BASE_REGS_BUILDINFO
+
SVEC_BASE_REGS_BUILDINFO_SIZE
-
1
;
off
+=
4
)
{
uint32_t
tmp
=
ioread32be
(
svec_fpga
->
fpga
+
off
);
int
k
;
...
...
@@ -145,7 +145,8 @@ static int svec_fpga_dbg_init(struct svec_fpga *svec_fpga)
goto
err
;
}
svec_fpga
->
dbg_bld_info
=
debugfs_create_file
(
SVEC_DBG_BLD_INFO_NAME
,
0444
,
svec_fpga
->
dbg_bld_info
=
debugfs_create_file
(
SVEC_DBG_BLD_INFO_NAME
,
0444
,
svec_fpga
->
dbg_dir
,
svec_fpga
,
&
svec_fpga_dbg_bld_info_ops
);
...
...
@@ -241,7 +242,8 @@ static struct resource svec_fpga_fmc_i2c_res[] = {
.
name
=
"i2c-ocores-mem"
,
.
flags
=
IORESOURCE_MEM
,
.
start
=
SVEC_BASE_REGS_FMC_I2C
,
.
end
=
SVEC_BASE_REGS_FMC_I2C
+
SVEC_BASE_REGS_FMC_I2C_SIZE
-
1
,
.
end
=
SVEC_BASE_REGS_FMC_I2C
+
SVEC_BASE_REGS_FMC_I2C_SIZE
-
1
,
},
{
.
name
=
"i2c-ocores-irq"
,
.
flags
=
IORESOURCE_IRQ
|
IORESOURCE_IRQ_HIGHLEVEL
,
...
...
@@ -264,7 +266,8 @@ static struct resource svec_fpga_spi_res[] = {
.name = "spi-ocores-mem",
.flags = IORESOURCE_MEM,
.start = SVEC_BASE_REGS_FLASH_SPI,
.end = SVEC_BASE_REGS_FLASH_SPI + SVEC_BASE_REGS_FLASH_SPI_SIZE - 1,
.end = SVEC_BASE_REGS_FLASH_SPI
+ SVEC_BASE_REGS_FLASH_SPI_SIZE - 1,
}, {
.name = "spi-ocores-irq",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
...
...
@@ -376,7 +379,8 @@ static ssize_t temperature_show(struct device *dev,
struct
svec_dev
*
svec_dev
=
dev_get_drvdata
(
svec_fpga
->
dev
.
parent
);
if
(
svec_dev
->
meta
.
cap
&
SVEC_META_CAP_THERM
)
{
uint32_t
temp
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_TEMP
);
uint32_t
temp
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_TEMP
);
return
snprintf
(
buf
,
PAGE_SIZE
,
"%d.%d C
\n
"
,
temp
/
16
,
(
temp
&
0xF
)
*
1000
/
16
);
...
...
@@ -395,8 +399,10 @@ static ssize_t serial_number_show(struct device *dev,
struct
svec_dev
*
svec_dev
=
dev_get_drvdata
(
svec_fpga
->
dev
.
parent
);
if
(
svec_dev
->
meta
.
cap
&
SVEC_META_CAP_THERM
)
{
uint32_t
msb
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_SERID_MSB
);
uint32_t
lsb
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_SERID_LSB
);
uint32_t
msb
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_SERID_MSB
);
uint32_t
lsb
=
ioread32be
(
svec_fpga
->
fpga
+
SVEC_FPGA_THERM_SERID_LSB
);
return
snprintf
(
buf
,
PAGE_SIZE
,
"0x%08x%08x
\n
"
,
msb
,
lsb
);
}
else
{
...
...
@@ -491,7 +497,7 @@ static ssize_t reset_app_store(struct device *dev,
return
count
;
}
static
DEVICE_ATTR
(
reset_app
,
0644
,
reset_app_show
,
reset_app_store
);
static
DEVICE_ATTR
_RW
(
reset_app
);
static
struct
attribute
*
svec_fpga_csr_attrs
[]
=
{
&
dev_attr_pcb_rev
.
attr
,
...
...
@@ -620,16 +626,17 @@ static int svec_fpga_app_id_build(struct svec_fpga *svec_fpga,
unsigned
long
app_off
,
char
*
id
,
unsigned
int
size
)
{
uint32_t
vendor
=
ioread32
(
svec_fpga
->
fpga
+
app_off
+
FPGA_META_VENDOR
);
uint32_t
device
=
ioread32
(
svec_fpga
->
fpga
+
app_off
+
FPGA_META_DEVICE
);
uint32_t
vendor
=
ioread32
(
svec_fpga
->
fpga
+
app_off
+
FPGA_META_VENDOR
);
uint32_t
device
=
ioread32
(
svec_fpga
->
fpga
+
app_off
+
FPGA_META_DEVICE
);
memset
(
id
,
0
,
size
);
if
(
vendor
==
0xFF000000
)
{
dev_warn
(
&
svec_fpga
->
dev
,
"Vendor UUID not supported yet
\n
"
);
return
-
ENODEV
;
}
else
{
snprintf
(
id
,
size
,
"id:%4phN%4phN"
,
&
vendor
,
&
device
);
}
snprintf
(
id
,
size
,
"id:%4phN%4phN"
,
&
vendor
,
&
device
);
return
0
;
}
...
...
software/kernel/svec-core.c
View file @
35fd11e5
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* SPDX-License-Identifier: GPLv2
*
* Copyright (C) 2017 CERN (www.cern.ch)
* Author: Federico Vaga <federico.vaga@cern.ch>
...
...
@@ -95,16 +95,9 @@ static ssize_t svec_dbg_fw_write(struct file *file,
return
count
;
}
static
int
svec_dbg_fw_open
(
struct
inode
*
inode
,
struct
file
*
file
)
{
file
->
private_data
=
inode
->
i_private
;
return
0
;
}
static
const
struct
file_operations
svec_dbg_fw_ops
=
{
.
owner
=
THIS_MODULE
,
.
open
=
s
vec_dbg_fw
_open
,
.
open
=
s
imple
_open
,
.
write
=
svec_dbg_fw_write
,
};
...
...
@@ -267,11 +260,9 @@ static int svec_fpga_write_word(struct fpga_manager *mgr,
uint32_t
xldr_fifo_r0
;
/* Bitstream data input control register */
uint32_t
xldr_fifo_r1
;
/* Bitstream data input register */
int
rv
,
try
=
10000
;
static
int
cnt
=
0
;
if
(
size
<=
0
||
size
>=
5
)
{
if
(
size
<=
0
||
size
>=
5
)
return
-
EINVAL
;
}
xldr_fifo_r0
=
((
size
-
1
)
&
0x3
)
|
(
is_last
?
XLDR_FIFO_R0_XLAST
:
0
);
xldr_fifo_r1
=
htonl
(
word
);
...
...
@@ -279,14 +270,12 @@ static int svec_fpga_write_word(struct fpga_manager *mgr,
rv
=
ioread32be
(
loader_addr
+
XLDR_REG_FIFO_CSR
);
}
while
(
rv
&
XLDR_FIFO_CSR_FULL
&&
--
try
>=
0
);
if
(
rv
&
XLDR_FIFO_CSR_FULL
)
if
(
rv
&
XLDR_FIFO_CSR_FULL
)
return
-
EBUSY
;
/* bootloader busy */
iowrite32be
(
xldr_fifo_r0
,
loader_addr
+
XLDR_REG_FIFO_R0
);
iowrite32be
(
xldr_fifo_r1
,
loader_addr
+
XLDR_REG_FIFO_R1
);
cnt
++
;
return
0
;
}
...
...
@@ -367,7 +356,8 @@ static int svec_fpga_write_stop(struct fpga_manager *mgr,
rval
=
ioread32be
(
loader_addr
+
XLDR_REG_CSR
);
if
(
rval
&
XLDR_CSR_DONE
)
break
;
msleep
(
1
);
usleep_range
(
900
,
1100
);
}
if
(
!
(
rval
&
XLDR_CSR_DONE
))
{
...
...
@@ -384,7 +374,7 @@ out:
iowrite32be
(
XLDR_CSR_EXIT
,
loader_addr
+
XLDR_REG_CSR
);
/* give the VME core a little while to settle up */
msleep
(
1
0
);
usleep_range
(
10000
,
2000
0
);
return
err
;
}
...
...
@@ -450,7 +440,8 @@ static int svec_fpga_write_init(struct fpga_manager *mgr,
}
static
int
svec_fpga_write
(
struct
fpga_manager
*
mgr
,
const
char
*
buf
,
size_t
count
)
static
int
svec_fpga_write
(
struct
fpga_manager
*
mgr
,
const
char
*
buf
,
size_t
count
)
{
return
svec_fpga_write_buf
(
mgr
,
buf
,
count
);
}
...
...
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