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Simple VME FMC Carrier SVEC
Commit e39fec66 authored by Federico Vaga's avatar Federico Vaga
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sw: configure the FPGA loader first, and then start 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 2ce54116
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Showing with 5 additions and 4 deletions
software/kernel/svec-core.c
View file @ e39fec66
...@@ -359,11 +359,12 @@ static int svec_fpga_write_start(struct fpga_manager *mgr) ...@@ -359,11 +359,12 @@ static int svec_fpga_write_start(struct fpga_manager *mgr)
} }
/* Reset the Xilinx Passive Serial boot interface */ /* Reset the Xilinx Passive Serial boot interface */
iowrite32be(XLDR_CSR_SWRST, iowrite32be(XLDR_CSR_SWRST, loader_addr + XLDR_REG_CSR);
loader_addr + XLDR_REG_CSR); mdelay(1);
/* Start configuration process by providing BigEndian data */ /* Start configuration process by providing BigEndian data */
iowrite32be(XLDR_CSR_START | XLDR_CSR_MSBF, iowrite32be(XLDR_CSR_MSBF, loader_addr + XLDR_REG_CSR);
loader_addr + XLDR_REG_CSR); iowrite32be(XLDR_CSR_START, loader_addr + XLDR_REG_CSR);
dev_dbg(&mgr->dev, "csr: 0x%08x\n", ioread32be(loader_addr + XLDR_REG_FIFO_CSR));
err_reset: err_reset:
return err; return err;
......
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