Add sw/test_irq.

193f15db · Tristan Gingold · f3cf9ecd · 193f15db · 193f15db
Commit 193f15db authored Mar 20, 2019 by Tristan Gingold
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Makefile sw/test_irq/Makefile +32 -0

test_irq.c sw/test_irq/test_irq.c +41 -0

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--- a/sw/test_irq/Makefile
+++ b/sw/test_irq/Makefile
+# and don't touch the rest unless you know what you're doing.
+CROSS_COMPILE ?= /opt/gcc-riscv/bin/riscv64-unknown-elf-
+
+XCC =		$(CROSS_COMPILE)gcc
+LD =		$(CROSS_COMPILE)ld
+OBJDUMP =	$(CROSS_COMPILE)objdump
+OBJCOPY =	$(CROSS_COMPILE)objcopy
+SIZE =		$(CROSS_COMPILE)size
+
+OUTPUT=test_irq
+
+CFLAGS = -mabi=ilp32 -march=rv32im
+OBJS = ../common/crt0.o ../common/irq.o $(OUTPUT).o
+LDS = ../common/ram2.ld
+
+
+$(OUTPUT): $(LDS) $(OBJS) ../genraminit
+	${XCC} $(CFLAGS) -o $(OUTPUT).elf -nostartfiles $(OBJS) -T $(LDS)
+	${OBJCOPY} -O binary $(OUTPUT).elf $(OUTPUT).bin
+	${OBJDUMP} -D $(OUTPUT).elf > disasm.S
+	$(SIZE) $(OUTPUT).elf
+#	../genramvhd -p wrc_simulation_firmware $(OUTPUT).bin >  wrc_simulation_firmware_pkg.vhd
+	../genraminit $(OUTPUT).bin 1000 > $(OUTPUT).ram
+
+clean:
+	rm -f $(OUTPUT).elf $(OUTPUT).bin $(OBJS)
+
+%.o: %.S
+	${XCC} -c $(CFLAGS) $< -o $@
+
+%.o: %.c
+	${XCC} -c $(CFLAGS) $< -o $@
--- a/sw/test_irq/test_irq.c
+++ b/sw/test_irq/test_irq.c
+static const char *hello="Hello, world";
+static const char *ptr;
+static int irq_cnt = 0;
+
+volatile int *TX_REG = (volatile int *)0x100000;
+volatile int *IRQ_REG = (volatile int *)0x100004;
+
+void
+irq_handler(void)
+{
+  irq_cnt++;
+
+  if (*ptr) {
+    *TX_REG = *ptr++;
+    if (irq_cnt < 2)
+      *IRQ_REG = 100;
+    else
+      *IRQ_REG = 10;
+  }
+  else
+    *IRQ_REG = 0;
+}
+
+void
+main(void)
+{
+  unsigned t;
+
+  ptr = hello;
+
+  /* Enable irq: set mie.meie  */
+  asm volatile ("csrrs %0, mie, %1" : "=r"(t) : "r"(1 << 11));
+
+  /* Enable interrupts: set mstatus.mie  */
+  asm volatile ("csrrsi %0, mstatus, %1" : "=r"(t) : "i"(1 << 3));
+
+  /* Generate an interrupt after 10 cycles.  */
+  *IRQ_REG = 10;
+
+  for(;;);
+}