Commit 8b9becd8 authored by Shareef Jalloq's avatar Shareef Jalloq

bugfix: x0 should return 0

This commit updates urv_regmem to hardwire x0 to return zero.  The
previous implementation allowed x0 to be written.

The bug was caught using the Riscof architecture test suite which
specifically checks for this by writing a value to x0 during at least
one of the tests.
parent 65e80de2
......@@ -47,8 +47,13 @@ module urv_regmem
reg [g_width-1:0] ram [0:31];
always@(posedge clk_i)
if(en1_i)
q1_o <= ram[a1_i];
if(en1_i) begin
if(a1_i == 5'd0) begin
q1_o <= 32'd0;
end else begin
q1_o <= ram[a1_i];
end
end
always@(posedge clk_i)
if(we2_i)
......
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