Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
U
urv-core
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
3
Issues
3
List
Board
Labels
Milestones
Merge Requests
2
Merge Requests
2
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
urv-core
Commits
bc0aef8a
Commit
bc0aef8a
authored
Dec 14, 2016
by
Tomasz Wlostowski
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fix a typo
parent
248e8d09
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
2 additions
and
2 deletions
+2
-2
urv_config.v
rtl/urv_config.v
+1
-1
urv_exec.v
rtl/urv_exec.v
+1
-1
No files found.
rtl/urv_config.v
View file @
bc0aef8a
...
...
@@ -23,6 +23,6 @@
// SPARTAN6 - Xilinx Spartan-6 FPGA
// GENERIC - Generic, HW-independent
`define
URV_PLATFORM_
SPARTAN6
1
`define
URV_PLATFORM_
GENERIC
1
//`define URV_PLATFORM_ALTERA 1
rtl/urv_exec.v
View file @
bc0aef8a
...
...
@@ -299,7 +299,7 @@ module urv_exec
.
d_rs1_i
(
rs1
)
,
.
d_rs2_i
(
rs2
)
,
.
d_fun_i
(
d_fun
)
,
.
d_fun_i
(
d_fun
_i
)
,
.
w_rd_o
(
w_rd_multiply_o
)
)
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment