hdl: fix licenses

5967cd30 · Dimitris Lampridis · c41cb87e · 5967cd30 · 5967cd30 · 5967cd30
Commit 5967cd30 authored Aug 03, 2023 by Dimitris Lampridis
18 changed files
--- a/.gitmodules
+++ b/.gitmodules
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 [submodule "pcie-vme-bridge"]
 	path = dependencies/wb-vme-bridge
 	url = https://ohwr.org/project/pcie-vme-bridge.git
--- a/.reuse/dep5
+++ b/.reuse/dep5
+Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
+Upstream-Name: VME SBC A25 PCIe-VME Bridge Firmware
+Upstream-Contact:
+Source: https://gitlab.cern.ch/be-cem-edl/fec/hardware-modules/vme-sbc-a25-pcie-vme-bridge
+
+Files: *.exe *.dll *.hex */bin2ihex */genDediProg */fpga_addheader
+Copyright: 2016
+License: GPL-3.0-or-later
+
+
+Files: hdl/16z091-01_src/Source/CycV/x1/CycVTransReconf.txt
+       hdl/16z091-01_src/Source/CycV/x1/PCIeHardIPCycV.txt
+       hdl/16z091-01_src/Source/CycV/x2/CycVTransReconf.txt
+       hdl/16z091-01_src/Source/CycV/x2/PCIeHardIPCycV.txt
+       hdl/16z091-01_src/Source/CycV/x4/CycVTransReconf.txt
+       hdl/16z091-01_src/Source/CycV/x4/PCIeHardIPCycV.txt
+       hdl/16z091-01_src/Source/alt_reconf/alt_reconf.txt
+       hdl/16z091-01_src/Source/x1/Hard_IP_x1.txt
+       hdl/16z091-01_src/Source/x4/Hard_IP_x4.txt
+       hdl/16z126-01_src/Source/z126_01_pasmi/z126_01_pasmi_m25p32.txt
+       hdl/16z126-01_src/Source/z126_01_ru/z126_01_ru_cycloneiv.txt
+       hdl/top/pll_pcie/pll_pcie.txt
+       hdl/top/chameleon_V2.xls
+       hdl/top/chameleon_V2.bak
+Copyright: 2016
+License: CERN-OHL-S-2.0+
--- a/LICENSES/CC-BY-SA-4.0.txt
+++ b/LICENSES/CC-BY-SA-4.0.txt
--- a/LICENSES/CERN-OHL-S-2.0.txt
+++ b/LICENSES/CERN-OHL-S-2.0.txt
--- a/LICENSES/GPL-3.0-or-later.txt
+++ b/LICENSES/GPL-3.0-or-later.txt
--- a/README.md
+++ b/README.md
+<!--
+SPDX-FileCopyrightText: 2023 CERN
+
+SPDX-License-Identifier: CC-BY-SA-4.0+
+-->
+
 # VME SBC A25 Building Files

 This projects contains files required to build the PCIe to VME bridge firmware

--- a/wb-vme-bridge @ 113f3afb
+++ b/wb-vme-bridge @ 113f3afb
-Subproject commit 1f6df31e01b455431c7bc152c018fd4f5fc15471
+Subproject commit 113f3afb680cf6f371e9f64e1f1b8deda0eab4d0
--- a/hdl/16z000-00_src/Manifest.py
+++ b/hdl/16z000-00_src/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 files = [
    "Source/fpga_pkg_2.vhd",
 ]
--- a/hdl/16z024-01_src/Manifest.py
+++ b/hdl/16z024-01_src/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 files = [
    "Source/iram_av.vhd",
    "Source/iram_dp_wb.vhd",

--- a/hdl/16z091-01_src/Manifest.py
+++ b/hdl/16z091-01_src/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 files = [
    "Source/error.vhd",
    "Source/generic_dcfifo_mixedw.vhd",

--- a/hdl/16z100-00_src/Manifest.py
+++ b/hdl/16z100-00_src/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 files = [
    "Source/clk_trans_wb2wb.vhd",
    "Source/fifo_d1.vhd",

--- a/hdl/16z126-01_src/Manifest.py
+++ b/hdl/16z126-01_src/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 files = [
    "Source/z126_01_clk_trans_wb2wb.vhd",
    "Source/z126_01_fifo_d1.vhd",

--- a/hdl/syn/.gitignore
+++ b/hdl/syn/.gitignore
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 *
 !.gitignore
 !Manifest.py

--- a/hdl/syn/A25_top.sdc
+++ b/hdl/syn/A25_top.sdc
-## Generated SDC file "A21_top.out.sdc"
-
-## Copyright (C) 1991-2011 Altera Corporation
-## Your use of Altera Corporation's design tools, logic functions 
-## and other software and tools, and its AMPP partner logic 
-## functions, and any output files from any of the foregoing 
-## (including device programming or simulation files), and any 
-## associated documentation or information are expressly subject 
-## to the terms and conditions of the Altera Program License 
-## Subscription Agreement, Altera MegaCore Function License 
-## Agreement, or other applicable license agreement, including, 
-## without limitation, that your use is for the sole purpose of 
-## programming logic devices manufactured by Altera and sold by 
-## Altera or its authorized distributors.  Please refer to the 
-## applicable agreement for further details.
-
-
-## VENDOR  "Altera"
-## PROGRAM "Quartus II"
-## VERSION "Version 11.1 Build 173 11/01/2011 SJ Full Version"
-
-## DATE    "Mon Jul 23 13:48:47 2012"
-
-##
-## DEVICE  "EP4CGX30CF23I7"
-##
+# SPDX-FileCopyrightText: 2016 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+


 #**************************************************************

--- a/hdl/syn/Manifest.py
+++ b/hdl/syn/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 action = "synthesis"

 syn_family  = "Cyclone IV GX"

--- a/hdl/syn/quartus.ini
+++ b/hdl/syn/quartus.ini
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 pgm_allow_epcs32=on
 PGMIO_IGNORE_EPCS_ID_CHECK=1 
--- a/hdl/top/Manifest.py
+++ b/hdl/top/Manifest.py
+# SPDX-FileCopyrightText: 2023 CERN (home.cern)
+#
+# SPDX-License-Identifier: CERN-OHL-S-2.0+
+
 modules = {
    "local" : [
        "../16z000-00_src/",

--- a/hdl/top/chameleon_V2.xls.license
+++ b/hdl/top/chameleon_V2.xls.license
-SPDX-FileCopyrightText: 2022 CERN (home.cern)
-
-SPDX-License-Identifier: CERN-OHL-S-2.0+