Document how to use PCIe x1 or x2
The core is by default PCIe x4. In principle it can also be used with x1 or x2 lanes, but it is not clear how to do this.
KS wrote on 14/12/20:
I think one more change needed in the firmware, for x2 lanes selection the IP cores generation script file i.e. "gen_ip_cores.tcl" should be modified to generate IP core for PCIe with x2 lanes as well:
. . source ../16z091-01_src/Source/x4/x4.tcl source ../16z091-01_src/Source/x1/x1.tcl . .
Either document it in the core, or add a FAQ question about this.