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White Rabbit core collection
Commit 0d05ac47 authored by Miguel Jimenez Lopez's avatar Miguel Jimenez Lopez Committed by Grzegorz Daniluk
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wrc_core: Export PPS valid output port. 

Fix a place & route error related to the OBUF used for PPS output signal.
parent ee358ebe
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Showing with 16 additions and 1 deletion
board/common/wr_board_pkg.vhd
View file @ 0d05ac47
...@@ -214,6 +214,7 @@ package wr_board_pkg is ...@@ -214,6 +214,7 @@ package wr_board_pkg is
btn1_i : in std_logic := '1'; btn1_i : in std_logic := '1';
btn2_i : in std_logic := '1'; btn2_i : in std_logic := '1';
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
link_ok_o : out std_logic); link_ok_o : out std_logic);
......
board/common/xwrc_board_common.vhd
View file @ 0d05ac47
...@@ -259,6 +259,7 @@ entity xwrc_board_common is ...@@ -259,6 +259,7 @@ entity xwrc_board_common is
btn2_i : in std_logic := '1'; btn2_i : in std_logic := '1';
-- 1PPS output -- 1PPS output
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
-- Link ok indication -- Link ok indication
...@@ -348,6 +349,10 @@ architecture struct of xwrc_board_common is ...@@ -348,6 +349,10 @@ architecture struct of xwrc_board_common is
-- signal sfp1_sda_in : std_logic; -- signal sfp1_sda_in : std_logic;
-- signal sfp1_det_in : std_logic; -- signal sfp1_det_in : std_logic;
signal pps_valid : std_logic;
signal pps_csync : std_logic;
begin -- architecture struct begin -- architecture struct
-- Check for unsupported fabric interface type -- Check for unsupported fabric interface type
...@@ -471,7 +476,8 @@ begin -- architecture struct ...@@ -471,7 +476,8 @@ begin -- architecture struct
tm_time_valid_o => tm_time_valid, tm_time_valid_o => tm_time_valid,
tm_tai_o => tm_tai, tm_tai_o => tm_tai,
tm_cycles_o => tm_cycles, tm_cycles_o => tm_cycles,
pps_csync_o => pps_csync_o, pps_csync_o => pps_csync,
pps_valid_o => pps_valid,
pps_p_o => pps_p_o, pps_p_o => pps_p_o,
pps_led_o => pps_led_o, pps_led_o => pps_led_o,
rst_aux_n_o => aux_rst_n, rst_aux_n_o => aux_rst_n,
...@@ -479,6 +485,8 @@ begin -- architecture struct ...@@ -479,6 +485,8 @@ begin -- architecture struct
aux_diag_o => aux_diag_out, aux_diag_o => aux_diag_out,
link_ok_o => link_ok); link_ok_o => link_ok);
pps_csync_o <= pps_csync;
pps_valid_o <= pps_valid;
link_ok_o <= link_ok; link_ok_o <= link_ok;
tm_time_valid_o <= tm_time_valid; tm_time_valid_o <= tm_time_valid;
tm_tai_o <= tm_tai; tm_tai_o <= tm_tai;
......
modules/wrc_core/wr_core.vhd
View file @ 0d05ac47
...@@ -293,6 +293,7 @@ entity wr_core is ...@@ -293,6 +293,7 @@ entity wr_core is
tm_cycles_o : out std_logic_vector(27 downto 0); tm_cycles_o : out std_logic_vector(27 downto 0);
-- 1PPS output -- 1PPS output
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
...@@ -637,6 +638,7 @@ begin ...@@ -637,6 +638,7 @@ begin
); );
ppsg_link_ok <= not phy_rst; ppsg_link_ok <= not phy_rst;
pps_csync_o <= s_pps_csync; pps_csync_o <= s_pps_csync;
pps_valid_o <= pps_valid;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Software PLL -- Software PLL
......
modules/wrc_core/wrcore_pkg.vhd
View file @ 0d05ac47
...@@ -486,6 +486,7 @@ package wrcore_pkg is ...@@ -486,6 +486,7 @@ package wrcore_pkg is
tm_tai_o : out std_logic_vector(39 downto 0); tm_tai_o : out std_logic_vector(39 downto 0);
tm_cycles_o : out std_logic_vector(27 downto 0); tm_cycles_o : out std_logic_vector(27 downto 0);
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
...@@ -724,6 +725,7 @@ package wrcore_pkg is ...@@ -724,6 +725,7 @@ package wrcore_pkg is
tm_cycles_o : out std_logic_vector(27 downto 0); tm_cycles_o : out std_logic_vector(27 downto 0);
-- 1PPS output -- 1PPS output
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
......
modules/wrc_core/xwr_core.vhd
View file @ 0d05ac47
...@@ -258,6 +258,7 @@ entity xwr_core is ...@@ -258,6 +258,7 @@ entity xwr_core is
tm_cycles_o : out std_logic_vector(27 downto 0); tm_cycles_o : out std_logic_vector(27 downto 0);
-- 1PPS output -- 1PPS output
pps_csync_o : out std_logic; pps_csync_o : out std_logic;
pps_valid_o : out std_logic;
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_led_o : out std_logic; pps_led_o : out std_logic;
...@@ -431,6 +432,7 @@ begin ...@@ -431,6 +432,7 @@ begin
tm_tai_o => tm_tai_o, tm_tai_o => tm_tai_o,
tm_cycles_o => tm_cycles_o, tm_cycles_o => tm_cycles_o,
pps_csync_o => pps_csync_o, pps_csync_o => pps_csync_o,
pps_valid_o => pps_valid_o,
pps_p_o => pps_p_o, pps_p_o => pps_p_o,
pps_led_o => pps_led_o, pps_led_o => pps_led_o,
......
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