[v4-merge] ep_tx_vlan_unit, std_logig instead of t_ep_out_registers

Because the same module will be used in wrsw_nic for untagging frames.

[v4-merge] ep_tx_vlan_unit, std_logig instead of t_ep_out_registers
Because the same module will be used in wrsw_nic for untagging frames.
31fb69c7 · Grzegorz Daniluk · 6294a6ab · 31fb69c7 · 31fb69c7 · 31fb69c7
Commit 31fb69c7 authored Feb 14, 2014 by Grzegorz Daniluk
Showing with 12 additions and 6 deletions

endpoint_private_pkg.vhd modules/wr_endpoint/endpoint_private_pkg.vhd +3 -1

ep_tx_path.vhd modules/wr_endpoint/ep_tx_path.vhd +3 -1

ep_tx_vlan_unit.vhd modules/wr_endpoint/ep_tx_vlan_unit.vhd +6 -4

No files found.
--- a/modules/wr_endpoint/endpoint_private_pkg.vhd
+++ b/modules/wr_endpoint/endpoint_private_pkg.vhd
@@ -222,7 +222,9 @@ package endpoint_private_pkg is
      src_dreq_i        : in  std_logic;
      inject_mem_addr_i : in  std_logic_vector(9 downto 0);
      inject_mem_data_o : out std_logic_vector(17 downto 0);
-      regs_i            : in  t_ep_out_registers);
+      uram_offset_wr_i  : in  std_logic;
+      uram_offset_i     : in  std_logic_vector(9 downto 0);
+      uram_data_i       : in  std_logic_vector(17 downto 0));
  end component;
  
  component ep_timestamping_unit

--- a/modules/wr_endpoint/ep_tx_path.vhd
+++ b/modules/wr_endpoint/ep_tx_path.vhd
@@ -263,7 +263,9 @@ begin  -- rtl
        src_dreq_i        => dreq_pipe(2),
        inject_mem_addr_i => vlan_mem_addr,
        inject_mem_data_o => vlan_mem_data,
-        regs_i            => regs_i);
+        uram_offset_wr_i  => regs_i.vcr1_offset_wr_o,
+        uram_offset_i     => regs_i.vcr1_offset_o,
+        uram_data_i       => regs_i.vcr1_data_o);
  end generate gen_with_vlan_unit;

  gen_without_vlan_unit : if(not g_with_vlans) generate

--- a/modules/wr_endpoint/ep_tx_vlan_unit.vhd
+++ b/modules/wr_endpoint/ep_tx_vlan_unit.vhd
@@ -72,7 +72,9 @@ entity ep_tx_vlan_unit is
    inject_mem_addr_i : in  std_logic_vector(9 downto 0);
    inject_mem_data_o : out std_logic_vector(17 downto 0);

-    regs_i : in t_ep_out_registers
+    uram_offset_wr_i  : in std_logic;
+    uram_offset_i     : in std_logic_vector(9 downto 0);
+    uram_data_i       : in std_logic_vector(17 downto 0)
    );


@@ -120,9 +122,9 @@ begin  -- behavioral
      wea_i   => '0',
      aa_i    => mem_addr_muxed,
      qa_o    => mem_rdata,
-      web_i   => regs_i.vcr1_offset_wr_o,
-      ab_i    => regs_i.vcr1_offset_o,
-      db_i    => regs_i.vcr1_data_o);
+      web_i   => uram_offset_wr_i,
+      ab_i    => uram_offset_i,
+      db_i    => uram_data_i);

  inject_mem_data_o <= mem_rdata;