Commit 486137e9 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

minic: update testbench to test Tx/Rx FIFOs

parent 6be7824c
......@@ -49,20 +49,23 @@ module main;
);
wire minic_irq;
wire [31:0] pmem_wr_data, pmem_rd_data;
wire [13:0] pmem_addr;
wire pmem_wr;
wr_mini_nic DUT
wr_mini_nic
#(
.g_interface_mode(PIPELINED),
.g_address_granularity(BYTE))
DUT
(
.clk_sys_i (clk_sys),
.rst_n_i (rst_n),
.mem_data_o (),
.mem_addr_o (),
.mem_data_i (32'h0),
.mem_wr_o (p),
// .mem_data_o (),
// .mem_addr_o (),
// .mem_data_i (32'h0),
// .mem_wr_o (p),
.src_dat_o (U_wrf_sink.dat_i),
.src_adr_o (U_wrf_sink.adr),
......@@ -87,7 +90,7 @@ module main;
.txtsu_port_id_i (5'b0),
.txtsu_frame_id_i (16'b0),
.txtsu_tsval_i (32'b0),
.txtsu_valid_i (1'b0),
.txtsu_stb_i (1'b0),
.txtsu_ack_o (),
......@@ -99,8 +102,7 @@ module main;
.wb_dat_i (U_sys_bus_master.dat_o),
.wb_dat_o (U_sys_bus_master.dat_i),
.wb_ack_o (U_sys_bus_master.ack),
.wb_stall_o (U_sys_bus_master.stall),
.wb_irq_o (minic_irq)
.wb_stall_o (U_sys_bus_master.stall)
);
CSimDrv_Minic minic;
......@@ -118,7 +120,8 @@ module main;
tmpl.has_smac = 1;
tmpl.is_q = 0;
gen.set_randomization(EthPacketGenerator::SEQ_PAYLOAD | EthPacketGenerator::ETHERTYPE | EthPacketGenerator::TX_OOB | EthPacketGenerator::EVEN_LENGTH) ;
//gen.set_randomization(EthPacketGenerator::SEQ_PAYLOAD | EthPacketGenerator::ETHERTYPE | EthPacketGenerator::TX_OOB | EthPacketGenerator::EVEN_LENGTH) ;
gen.set_randomization(EthPacketGenerator::SEQ_PAYLOAD | EthPacketGenerator::TX_OOB) ;
gen.set_template(tmpl);
gen.set_size(60,1500);
......@@ -143,12 +146,12 @@ module main;
EthPacket rxp, sent;
sink.recv(rxp);
sent = txed.pop_front();
if(!sent.equal(rxp, EthPacket::CMP_OOB))
begin
sent.dump();
rxp.dump();
$stop;
end
if(!sent.equal(rxp, EthPacket::CMP_OOB)) begin
$warning("ups...");
sent.dump();
rxp.dump();
// $stop;
end
end
#1;
end
......@@ -172,7 +175,12 @@ module main;
@(posedge clk_sys);
sys_bus = U_sys_bus_master.get_accessor();
sys_bus.set_mode(CLASSIC);
sys_bus.set_mode(PIPELINED);
U_sys_bus_master.settings.cyc_on_stall = 1;
U_sys_bus_master.settings.addr_gran = WORD;
U_wrf_sink.settings.gen_random_stalls = 1;
U_wrf_source.settings.cyc_on_stall = 1;
U_wrf_source.settings.gen_random_throttling = 1;
minic = new(sys_bus, 0);
minic.init();
......@@ -183,46 +191,59 @@ module main;
tmpl.has_smac = 1;
tmpl.is_q = 0;
gen.set_randomization(EthPacketGenerator::SEQ_PAYLOAD | EthPacketGenerator::ETHERTYPE /*| EthPacketGenerator::RX_OOB*/) ;
gen.set_randomization(EthPacketGenerator::SEQ_PAYLOAD | EthPacketGenerator::RX_OOB) ;
gen.set_template(tmpl);
gen.set_size(60,1500);
#40us;
@(posedge clk_sys);
fork
forever
begin
minic.run();
force DUT.irq_tx_mask = 1;
force DUT.irq_tx_ack = 1;
//test_tx_path(1500, minic, sink);
if(minic.poll())
begin
EthPacket rxp, sent;
minic.recv(rxp);
sent = txed.pop_front();
if(!sent.equal(rxp, EthPacket::CMP_OOB))
begin
sent.dump();
rxp.dump();
$stop;
end
/* -----\/----- EXCLUDED -----\/-----
else
rxp.dump();
-----/\----- EXCLUDED -----/\----- */
end
force DUT.irq_rx_ack = 1;
#1;
end
// test RX path
fork
forever begin
minic.run();
if(minic.poll()) begin
EthPacket rxp, sent;
int sent_id, rxp_id;
minic.recv(rxp);
sent = txed.pop_front();
sent_id = ((sent.payload[1] << 8) & 'hff00) | sent.payload[0];
rxp_id = ((rxp.payload[1] << 8) & 'hff00) | rxp.payload[0];
while (sent_id < rxp_id) begin
//$display("!! Lost frame %x", sent.payload[0]);
sent = txed.pop_front();
sent_id = (sent.payload[1] << 8) & 'hff00 | sent.payload[0];
end
//if(!sent.equal(rxp, EthPacket::CMP_OOB)) begin
if(!sent.equal(rxp)) begin
//sent.dump();
//rxp.dump();
$warning;
end
end //minic.poll
#1;
end
// forever
begin
for(i=0;i<100;i++)
#40ns;
for(i=0;i<1500;i++)
begin
pkt = gen.gen();
pkt.payload[0] = i & 'hff;
pkt.payload[1] = (i & 'hff00) >> 8;
src.send(pkt);
txed.push_back(pkt);
#45us;
end
......@@ -230,10 +251,6 @@ module main;
join
end // initial begin
......
......@@ -5,6 +5,7 @@ set StdArithNoWarnings 1
set NumericStdNoWarnings 1
do wave.do
radix -hexadecimal
run 250us
#run 50ms
run 100ms
wave zoomfull
radix -hexadecimal
......@@ -6,118 +6,67 @@ add wave -noupdate /main/DUT/g_memsize_log2
add wave -noupdate /main/DUT/g_buffer_little_endian
add wave -noupdate /main/DUT/clk_sys_i
add wave -noupdate /main/DUT/rst_n_i
add wave -noupdate /main/DUT/mem_data_o
add wave -noupdate /main/DUT/mem_addr_o
add wave -noupdate /main/DUT/mem_data_i
add wave -noupdate /main/DUT/mem_wr_o
add wave -noupdate /main/DUT/src_dat_o
add wave -noupdate /main/DUT/src_adr_o
add wave -noupdate /main/DUT/src_sel_o
add wave -noupdate /main/DUT/src_cyc_o
add wave -noupdate /main/DUT/src_stb_o
add wave -noupdate /main/DUT/src_we_o
add wave -noupdate /main/DUT/src_stall_i
add wave -noupdate /main/DUT/src_err_i
add wave -noupdate /main/DUT/src_ack_i
add wave -noupdate /main/DUT/snk_dat_i
add wave -noupdate /main/DUT/snk_adr_i
add wave -noupdate /main/DUT/snk_sel_i
add wave -noupdate /main/DUT/snk_cyc_i
add wave -noupdate /main/DUT/snk_stb_i
add wave -noupdate /main/DUT/snk_we_i
add wave -noupdate /main/DUT/snk_stall_o
add wave -noupdate /main/DUT/snk_err_o
add wave -noupdate /main/DUT/snk_ack_o
add wave -noupdate /main/DUT/txtsu_port_id_i
add wave -noupdate /main/DUT/txtsu_frame_id_i
add wave -noupdate /main/DUT/txtsu_tsval_i
add wave -noupdate /main/DUT/txtsu_valid_i
add wave -noupdate /main/DUT/txtsu_ack_o
add wave -noupdate /main/DUT/wb_cyc_i
add wave -noupdate /main/DUT/wb_stb_i
add wave -noupdate /main/DUT/wb_we_i
add wave -noupdate /main/DUT/wb_sel_i
add wave -noupdate /main/DUT/wb_adr_i
add wave -noupdate /main/DUT/wb_dat_i
add wave -noupdate /main/DUT/wb_dat_o
add wave -noupdate /main/DUT/wb_ack_o
add wave -noupdate /main/DUT/wb_stall_o
add wave -noupdate /main/DUT/wb_irq_o
add wave -noupdate /main/DUT/src_cyc_int
add wave -noupdate /main/DUT/src_stb_int
add wave -noupdate /main/DUT/snk_stall_int
add wave -noupdate /main/DUT/ntx_mem_d
add wave -noupdate /main/DUT/ntx_mem_a
add wave -noupdate /main/DUT/nrx_mem_d
add wave -noupdate /main/DUT/nrx_mux_d
add wave -noupdate /main/DUT/nrx_mem_a
add wave -noupdate /main/DUT/nrx_mem_wr
add wave -noupdate /main/DUT/mem_arb_rx
add wave -noupdate /main/DUT/mem_arb_tx
add wave -noupdate /main/DUT/ntx_status_reg
add wave -noupdate /main/DUT/ntx_data_reg
add wave -noupdate /main/DUT/ntx_cntr_is_zero
add wave -noupdate /main/DUT/ntx_cntr_is_one
add wave -noupdate /main/DUT/ntx_timeout_is_zero
add wave -noupdate /main/DUT/ntx_cntr
add wave -noupdate /main/DUT/ntx_timeout
add wave -noupdate /main/DUT/ntx_ack_count
add wave -noupdate /main/DUT/ntx_has_oob
add wave -noupdate /main/DUT/ntx_state
add wave -noupdate /main/DUT/ntx_start_delayed
add wave -noupdate /main/DUT/ntx_size_odd
add wave -noupdate /main/DUT/ntx_oob_reg
add wave -noupdate /main/DUT/nrx_state
add wave -noupdate /main/DUT/nrx_avail
add wave -noupdate /main/DUT/nrx_toggle
add wave -noupdate /main/DUT/nrx_oob_reg
add wave -noupdate /main/DUT/nrx_status_reg
add wave -noupdate /main/DUT/nrx_error
add wave -noupdate /main/DUT/nrx_mem_a_saved
add wave -noupdate /main/DUT/nrx_has_oob
add wave -noupdate /main/DUT/nrx_bytesel
add wave -noupdate /main/DUT/nrx_size
add wave -noupdate /main/DUT/nrx_rdreg
add wave -noupdate /main/DUT/nrx_buf_full
add wave -noupdate /main/DUT/nrx_stall_mask
add wave -noupdate /main/DUT/nrx_valid
add wave -noupdate /main/DUT/nrx_done
add wave -noupdate /main/DUT/nrx_drop
add wave -noupdate /main/DUT/nrx_stat_error
add wave -noupdate /main/DUT/regs_in
add wave -noupdate /main/DUT/regs_out
add wave -noupdate /main/DUT/wb_in
add wave -noupdate /main/DUT/wb_out
add wave -noupdate /main/DUT/irq_tx
add wave -noupdate /main/DUT/irq_rx_ack
add wave -noupdate /main/DUT/irq_rx
add wave -noupdate /main/DUT/nrx_newpacket
add wave -noupdate /main/DUT/nrx_newpacket_d0
add wave -noupdate /main/DUT/irq_txts
add wave -noupdate /main/DUT/irq_tx_ack
add wave -noupdate /main/DUT/irq_tx_mask
add wave -noupdate /main/DUT/txtsu_ack_int
add wave -noupdate /main/DUT/nrx_status_hp
add wave -noupdate /main/DUT/nrx_status_smac
add wave -noupdate /main/DUT/nrx_status_crc
add wave -noupdate /main/DUT/nrx_status_err
add wave -noupdate /main/DUT/nrx_status_tagme
add wave -noupdate /main/DUT/nrx_status_class
add wave -noupdate /main/DUT/ntx_status_hp
add wave -noupdate /main/DUT/ntx_status_smac
add wave -noupdate /main/DUT/ntx_status_crc
add wave -noupdate /main/DUT/ntx_status_err
add wave -noupdate /main/DUT/ntx_status_tagme
add wave -noupdate /main/DUT/ntx_status_class
add wave -noupdate /main/DUT/ntx_desc_has_src_mac
add wave -noupdate /main/DUT/ntx_desc_802_1q
add wave -noupdate /main/DUT/ntx_desc_with_oob
add wave -noupdate /main/DUT/ntx_desc_valid
add wave -noupdate /main/DUT/ntx_desc_oob
add wave -noupdate /main/DUT/ntx_desc_size
add wave -noupdate -group SRC /main/DUT/src_dat_o
add wave -noupdate -group SRC /main/DUT/src_adr_o
add wave -noupdate -group SRC /main/DUT/src_sel_o
add wave -noupdate -group SRC /main/DUT/src_cyc_o
add wave -noupdate -group SRC /main/DUT/src_stb_o
add wave -noupdate -group SRC /main/DUT/src_we_o
add wave -noupdate -group SRC /main/DUT/src_stall_i
add wave -noupdate -group SRC /main/DUT/src_err_i
add wave -noupdate -group SRC /main/DUT/src_ack_i
add wave -noupdate -expand -group SNK /main/DUT/snk_dat_i
add wave -noupdate -expand -group SNK /main/DUT/snk_adr_i
add wave -noupdate -expand -group SNK /main/DUT/snk_sel_i
add wave -noupdate -expand -group SNK /main/DUT/snk_cyc_i
add wave -noupdate -expand -group SNK /main/DUT/snk_stb_i
add wave -noupdate -expand -group SNK /main/DUT/snk_we_i
add wave -noupdate -expand -group SNK /main/DUT/snk_stall_o
add wave -noupdate -expand -group SNK /main/DUT/snk_err_o
add wave -noupdate -expand -group SNK /main/DUT/snk_ack_o
add wave -noupdate -group TXTSU /main/DUT/txtsu_port_id_i
add wave -noupdate -group TXTSU /main/DUT/txtsu_frame_id_i
add wave -noupdate -group TXTSU /main/DUT/txtsu_tsval_i
add wave -noupdate -group TXTSU /main/DUT/txtsu_ack_o
add wave -noupdate -group WB -expand /main/DUT/wb_out
add wave -noupdate -group WB -expand /main/DUT/wb_in
add wave -noupdate -expand -group TX_PATH -height 16 /main/DUT/ntx_state
add wave -noupdate -expand -group TX_PATH -radix unsigned /main/DUT/ntx_ack_count
add wave -noupdate -expand -group TX_PATH /main/DUT/ntx_flush_last
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_d
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_q
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_we
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_rd
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_empty
add wave -noupdate -expand -group TX_PATH /main/DUT/tx_fifo_full
add wave -noupdate -expand -group TX_PATH /main/DUT/txf_ferror
add wave -noupdate -expand -group TX_PATH /main/DUT/txf_fnew
add wave -noupdate -expand -group TX_PATH /main/DUT/txf_data
add wave -noupdate -expand -group TX_PATH /main/DUT/txf_type
add wave -noupdate -expand -group TX_PATH /main/DUT/ntx_stored_dat
add wave -noupdate -expand -group TX_PATH /main/DUT/ntx_stored_type
add wave -noupdate -expand -group TX_PATH /main/DUT/irq_tx
add wave -noupdate -expand -group TX_PATH /main/DUT/irq_tx_ack
add wave -noupdate -expand -group TX_PATH /main/DUT/irq_tx_mask
add wave -noupdate -expand -group TX_PATH /main/DUT/ntx_newpacket
add wave -noupdate -expand -group RX_PATH /main/DUT/regs_out
add wave -noupdate -expand -group RX_PATH -radix unsigned /main/DUT/RX_FIFO/count_o
add wave -noupdate -expand -group RX_PATH -height 16 /main/DUT/nrx_state
add wave -noupdate -expand -group RX_PATH /main/DUT/nrx_sof
add wave -noupdate -expand -group RX_PATH /main/DUT/nrx_eof
add wave -noupdate -expand -group RX_PATH /main/DUT/rxf_data
add wave -noupdate -expand -group RX_PATH /main/DUT/rxf_type
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_we
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_q
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_rd
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_empty
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_full
add wave -noupdate -expand -group RX_PATH /main/DUT/rx_fifo_afull
add wave -noupdate -expand -group RX_PATH /main/DUT/irq_rx_ack
add wave -noupdate -expand -group RX_PATH /main/DUT/irq_rx
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {90685000000 fs} 0}
configure wave -namecolwidth 150
WaveRestoreCursors {{Cursor 1} {40485000000 fs} 1} {{Cursor 2} {2056885000000 fs} 0}
configure wave -namecolwidth 208
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
......@@ -131,4 +80,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {90556826170 fs} {90813173830 fs}
WaveRestoreZoom {0 fs} {84338283750 ps}
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