platform: added component wr_arria10_tx_pll

5ed42b0f · A. Hahn · d3909900 · 5ed42b0f
Commit 5ed42b0f authored Mar 07, 2019 by A. Hahn
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wr_altera_pkg.vhd platform/altera/wr_altera_pkg.vhd +10 -0

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--- a/platform/altera/wr_altera_pkg.vhd
+++ b/platform/altera/wr_altera_pkg.vhd
@@ -336,6 +336,16 @@ package wr_altera_pkg is
    );
  end component wr_arria10_atx_pll;

+  component wr_arria10_tx_pll is
+    port (
+      pll_refclk0   : in  std_logic := 'X';
+      pll_powerdown : in  std_logic := 'X';
+      pll_locked    : out std_logic;
+      tx_serial_clk : out std_logic;
+      pll_cal_busy  : out std_logic
+    );
+  end component wr_arria10_tx_pll;
+
  -------------------------------------------------------------------------------

  component wr_arria10_rst_ctl is