wr_core: use new minic with FIFOs

89e028ef · Grzegorz Daniluk · cc3a501c · 89e028ef · 89e028ef
Commit 89e028ef authored Nov 03, 2016 by Grzegorz Daniluk
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Showing with 9 additions and 16 deletions

wr_core.vhd modules/wrc_core/wr_core.vhd +7 -11

wrcore_pkg.vhd modules/wrc_core/wrcore_pkg.vhd +2 -5

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--- a/modules/wrc_core/wr_core.vhd
+++ b/modules/wrc_core/wr_core.vhd
@@ -725,17 +725,13 @@ begin
    generic map (
      g_interface_mode       => PIPELINED,
      g_address_granularity  => BYTE,
-      g_memsize_log2         => f_log2_size(g_dpram_size),
+      g_tx_fifo_size         => 1024,
+      g_rx_fifo_size         => 2048,
      g_buffer_little_endian => false)
    port map (
      clk_sys_i => clk_sys_i,
      rst_n_i   => rst_net_n,

-      mem_data_o => mnic_mem_data_o,
-      mem_addr_o => mnic_mem_addr_o,
-      mem_data_i => mnic_mem_data_i,
-      mem_wr_o   => mnic_mem_wr_o,
-
      src_o => mux_snk_in(0),
      src_i => mux_snk_out(0),
      snk_o => mux_src_in(0),
@@ -793,12 +789,12 @@ begin
      slave2_o => dpram_wbb_o
      );

-  dpram_wbb_i.cyc                                 <= '1';
-  dpram_wbb_i.stb                                 <= '1';
-  dpram_wbb_i.adr(c_mnic_memsize_log2-1 downto 0) <= mnic_mem_addr_o;
+  dpram_wbb_i.cyc                                 <= '0';
+  dpram_wbb_i.stb                                 <= '0';
+  dpram_wbb_i.adr(c_mnic_memsize_log2-1 downto 0) <= (others=>'0'); --mnic_mem_addr_o;
  dpram_wbb_i.sel                                 <= "1111";
-  dpram_wbb_i.we                                  <= mnic_mem_wr_o;
-  dpram_wbb_i.dat                                 <= mnic_mem_data_o;
+  dpram_wbb_i.we                                  <= '0'; --mnic_mem_wr_o;
+  dpram_wbb_i.dat                                 <= (others=>'0'); --mnic_mem_data_o;
  mnic_mem_data_i                                 <= dpram_wbb_o.dat;

  -----------------------------------------------------------------------------

--- a/modules/wrc_core/wrcore_pkg.vhd
+++ b/modules/wrc_core/wrcore_pkg.vhd
@@ -83,15 +83,12 @@ package wrcore_pkg is
    generic (
      g_interface_mode       : t_wishbone_interface_mode;
      g_address_granularity  : t_wishbone_address_granularity;
-      g_memsize_log2         : integer;
+      g_tx_fifo_size         : integer;
+      g_rx_fifo_size         : integer;
      g_buffer_little_endian : boolean);
    port (
      clk_sys_i           : in  std_logic;
      rst_n_i             : in  std_logic;
-      mem_data_o          : out std_logic_vector(31 downto 0);
-      mem_addr_o          : out std_logic_vector(g_memsize_log2-1 downto 0);
-      mem_data_i          : in  std_logic_vector(31 downto 0);
-      mem_wr_o            : out std_logic;
      src_o               : out t_wrf_source_out;
      src_i               : in  t_wrf_source_in;
      snk_o               : out t_wrf_sink_out;