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White Rabbit core collection
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White Rabbit core collection
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9f28afd0
Commit
9f28afd0
authored
Apr 15, 2024
by
A. Hahn
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arria10: fix reset controller issue
parent
65a77d65
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wr_arria10_phy.vhd
platform/altera/wr_arria10_phy/wr_arria10_phy.vhd
+3
-3
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platform/altera/wr_arria10_phy/wr_arria10_phy.vhd
View file @
9f28afd0
...
...
@@ -573,7 +573,7 @@ begin
end
generate
cmu_pll
;
end
generate
scu4_pll_and_reset
;
ftm4_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
ftm
4"
)
generate
ftm4_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
FTM
4"
)
generate
inst_rst_ctl
:
wr_arria10_ftm4_rst_ctl
port
map
(
clock
=>
clk_ref_i
,
...
...
@@ -617,7 +617,7 @@ begin
end
generate
cmu_pll
;
end
generate
ftm4_pll_and_reset
;
pex10_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
pex
10"
)
generate
pex10_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
PEX
10"
)
generate
inst_rst_ctl
:
wr_arria10_pex10_rst_ctl
port
map
(
clock
=>
clk_ref_i
,
...
...
@@ -661,7 +661,7 @@ begin
end
generate
cmu_pll
;
end
generate
pex10_pll_and_reset
;
ftm10_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
ftm
10"
)
generate
ftm10_pll_and_reset
:
if
(
g_family
=
"Arria 10 GX
FTM
10"
)
generate
inst_rst_ctl
:
wr_arria10_ftm10_rst_ctl
port
map
(
clock
=>
clk_ref_i
,
...
...
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