Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non…

Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non driven FPGA pin after configuration done. (it did break the JTAG chain after configuration.

Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non…
Add prsnt_m2c_l_i input pin. Prevents prsnt_m2c_l line to be influenced by a non driven FPGA pin after configuration done. (it did break the JTAG chain after configuration.
b2a37277 · Peter Jansweijer · 858b9fd2 · b2a37277 · b2a37277
Commit b2a37277 authored Nov 27, 2019 by Peter Jansweijer
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spec7_write_top.vhd top/spec7_write_design/spec7_write_top.vhd +2 -0

spec7_write_top.xdc top/spec7_write_design/spec7_write_top.xdc +2 -0

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--- a/top/spec7_write_design/spec7_write_top.vhd
+++ b/top/spec7_write_design/spec7_write_top.vhd
@@ -149,6 +149,7 @@ entity spec7_write_top is
    reset_n_i   : in  std_logic;
    suicide_n_o : out std_logic;
    wdog_n_o    : out std_logic;
+    prsnt_m2c_l_i : in  std_logic;

    ------------------------------------------------------------------------------
    -- Digital I/O Bulls-Eye connections
@@ -278,6 +279,7 @@ begin  -- architecture top
  -- Never trigger PS_POR or PROGRAM_B
  suicide_n_o <= '1';
  wdog_n_o    <= '1';
+  -- prsnt_m2c_l_i isn't used but must be defined as input.

  -----------------------------------------------------------------------------
  -- The WR PTP core board package (WB Slave + WB Master)

--- a/top/spec7_write_design/spec7_write_top.xdc
+++ b/top/spec7_write_design/spec7_write_top.xdc
@@ -188,6 +188,8 @@ set_property PACKAGE_PIN AC22 [get_ports suicide_n_o]
 set_property IOSTANDARD LVCMOS25 [get_ports suicide_n_o]
 set_property PACKAGE_PIN AC21 [get_ports wdog_n_o]
 set_property IOSTANDARD LVCMOS25 [get_ports wdog_n_o]
+set_property PACKAGE_PIN V19 [get_ports prsnt_m2c_l_i]
+set_property IOSTANDARD LVCMOS25 [get_ports prsnt_m2c_l_i]

 # SI570
 # Bank 12 (HR) VCCO - 2.5 V