platform/xilinx/wr_gtp_phy: fixed divider configuration fot 62.5 MHz GTX reference

b8482524 · Tomasz Wlostowski · 025827c9 · b8482524
Commit b8482524 authored Apr 19, 2012 by Tomasz Wlostowski
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whiterabbitgtx_wrapper_gtx.vhd platform/xilinx/wr_gtp_phy/whiterabbitgtx_wrapper_gtx.vhd +2 -2

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--- a/platform/xilinx/wr_gtp_phy/whiterabbitgtx_wrapper_gtx.vhd
+++ b/platform/xilinx/wr_gtp_phy/whiterabbitgtx_wrapper_gtx.vhd
@@ -269,12 +269,12 @@ begin
      RX_OVERSAMPLE_MODE => (false),
      RXPLL_COM_CFG      => (x"21680a"),
      RXPLL_CP_CFG       => (x"0D"),
-      RXPLL_DIVSEL_FB    => (2),
+      RXPLL_DIVSEL_FB    => (4),
      RXPLL_DIVSEL_OUT   => (2),
      RXPLL_DIVSEL_REF   => (1),
      RXPLL_DIVSEL45_FB  => (5),
      RXPLL_LKDET_CFG    => ("111"),
-      RX_CLK25_DIVIDER   => (5),
+      RX_CLK25_DIVIDER   => (3),

      -------------------------RX Interface-------------------------
      GEN_RXUSRCLK  => (true),