Commit f99572ae authored by Wesley W. Terpstra's avatar Wesley W. Terpstra

Fixup the hdlmake files used for SCU1+2

parent e8df2a6a
target = "altera"
action = "synthesis"
fetchto = "../../../ip_cores"
syn_device = "ep2agx125ef"
syn_grade = "c5"
syn_package = "29"
syn_top = "scu_top"
syn_project = "scu"
modules = {"local" : [ "../../../", "../../../top/gsi_scu/wr_core_demo"]}
......@@ -5,5 +5,4 @@ modules = {
"git" : "git://ohwr.org/hdl-core-lib/etherbone-core.git"
};
files = ["scu_top.vhd", "pow_reset.vhd", "spec_serial_dac_arb.vhd",
"spec_serial_dac.vhd"]
files = ["scu_top.vhd"]
......@@ -5,5 +5,4 @@ modules = {
"git" : "git://ohwr.org/hdl-core-lib/etherbone-core.git"
};
files = ["scu_top.vhd", "pow_reset.vhd", "spec_serial_dac_arb.vhd",
"spec_serial_dac.vhd"]
files = ["scu_top.vhd" ]
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