The softpll_ng takes in a reset line from the sys clock domain.
It instantiates several dmtd_with_deglitcher FSMs which need reset.

The symptom of this bug is that on 3% of power-ups, some of the
deglitchers will not issue tags, because they power-on into an
undefined FSM state. This is caused by feeding the reset from a
different clock domain, leading to a race condition on release.

There was some code that probably used to solve this issue, whereby
the sys reset was synchronized to the clk_dmtd_i. However, the
softpll_ng instantiates multiple deglitchers, each in a different
domain and thus this single synchronizer chain can not work for all
of the deglitcher instances.

The fix is simple: synchronize the reset for each clock domain.