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White Rabbit Network Interface Card
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White Rabbit Network Interface Card
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d81acd5e
Commit
d81acd5e
authored
Aug 01, 2019
by
Miguel Jimenez Lopez
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Synchronize PPS signals from clk_ref (125 MHz) to clk_sys (62.5 MHz).
parent
191a3775
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2 deletions
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nic_top.vhd
hdl/top/nic/nic_top.vhd
+26
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hdl/top/nic/nic_top.vhd
View file @
d81acd5e
...
...
@@ -290,8 +290,10 @@ architecture top of nic_top is
signal
wrc_pps_out
:
std_logic
;
signal
wrc_pps_csync_out
:
std_logic
;
signal
wrc_pps_csync_out_ext
:
std_logic
;
signal
wrc_pps_csync_out_ext_int
:
std_logic
;
signal
wrc_pps_valid_out
:
std_logic
;
signal
wrc_pps_valid_out_ext
:
std_logic
;
signal
wrc_pps_valid_out_ext_int
:
std_logic
;
signal
wrc_pps_led
:
std_logic
;
signal
wrc_pps_in
:
std_logic
;
signal
svec_led
:
std_logic_vector
(
15
downto
0
);
...
...
@@ -511,7 +513,18 @@ begin -- architecture top
clk_i
=>
clk_ref_125m
,
rst_n_i
=>
rst_ref_125m_n
,
pulse_i
=>
wrc_pps_csync_out
,
extended_o
=>
wrc_pps_csync_out_ext
);
extended_o
=>
wrc_pps_csync_out_ext_int
);
sync_ffs_pps_csync
:
gc_sync_ffs
generic
map
(
g_sync_edge
=>
"positive"
)
port
map
(
clk_i
=>
clk_sys_62m5
,
rst_n_i
=>
rst_sys_62m5_n
,
data_i
=>
wrc_pps_csync_out_ext_int
,
synced_o
=>
open
,
npulse_o
=>
open
,
ppulse_o
=>
wrc_pps_csync_out_ext
);
-- Logic to extend pps_valid_o (125 MHz) in order to be detected
-- in clk_sys (62.5 MHz) domain.
...
...
@@ -522,7 +535,18 @@ begin -- architecture top
clk_i
=>
clk_ref_125m
,
rst_n_i
=>
rst_ref_125m_n
,
pulse_i
=>
wrc_pps_valid_out
,
extended_o
=>
wrc_pps_valid_out_ext
);
extended_o
=>
wrc_pps_valid_out_ext_int
);
sync_ffs_pps_valid
:
gc_sync_ffs
generic
map
(
g_sync_edge
=>
"positive"
)
port
map
(
clk_i
=>
clk_sys_62m5
,
rst_n_i
=>
rst_sys_62m5_n
,
data_i
=>
wrc_pps_valid_out_ext_int
,
synced_o
=>
open
,
npulse_o
=>
open
,
ppulse_o
=>
wrc_pps_valid_out_ext
);
-- Tristates for SFP EEPROM
sfp_mod_def1_b
<=
'0'
when
sfp_scl_out
=
'0'
else
'Z'
;
...
...
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