Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
W
White Rabbit Switch - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
12
Issues
12
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
Projects
White Rabbit Switch - Gateware
Commits
64ec2aca
Commit
64ec2aca
authored
Mar 12, 2012
by
Tomasz Wlostowski
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
wrsw_rtu: removed HCAM stuff (no longer used)
parent
1af92561
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
33 additions
and
186 deletions
+33
-186
wrsw_rtu_match.vhd
modules/wrsw_rtu/wrsw_rtu_match.vhd
+2
-10
wrsw_rtu_private_pkg.vhd
modules/wrsw_rtu/wrsw_rtu_private_pkg.vhd
+31
-176
No files found.
modules/wrsw_rtu/wrsw_rtu_match.vhd
View file @
64ec2aca
...
@@ -6,7 +6,7 @@
...
@@ -6,7 +6,7 @@
-- Author : Maciej Lipinski
-- Author : Maciej Lipinski
-- Company : CERN BE-Co-HT
-- Company : CERN BE-Co-HT
-- Created : 2010-05-08
-- Created : 2010-05-08
-- Last update: 2012-0
1-26
-- Last update: 2012-0
3-09
-- Platform : FPGA-generic
-- Platform : FPGA-generic
-- Standard : VHDL
-- Standard : VHDL
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
...
@@ -151,10 +151,6 @@ entity wrsw_rtu_match is
...
@@ -151,10 +151,6 @@ entity wrsw_rtu_match is
-- Write strobe (active high)
-- Write strobe (active high)
rtu_aram_main_wr_o
:
out
std_logic
;
rtu_aram_main_wr_o
:
out
std_logic
;
-- Port for std_logic_vector field: 'Aging register value' in reg: 'Aging register for HCAM'
rtu_agr_hcam_i
:
in
std_logic_vector
(
31
downto
0
);
rtu_agr_hcam_o
:
out
std_logic_vector
(
31
downto
0
);
rtu_agr_hcam_load_i
:
in
std_logic
;
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- VLAN TABLE
-- VLAN TABLE
...
@@ -350,7 +346,6 @@ architecture behavioral of wrsw_rtu_match is
...
@@ -350,7 +346,6 @@ architecture behavioral of wrsw_rtu_match is
signal
s_src_dst_sel
:
std_logic
;
signal
s_src_dst_sel
:
std_logic
;
signal
s_agr_hcam_reg
:
std_logic_vector
(
31
downto
0
);
-- we remenber taht we learned request, not to send it
-- we remenber taht we learned request, not to send it
-- second time to learning queue
-- second time to learning queue
...
@@ -414,7 +409,7 @@ begin
...
@@ -414,7 +409,7 @@ begin
s_port_id_vector
(
31
downto
c_rtu_num_ports
)
<=
(
others
=>
'0'
);
s_port_id_vector
(
31
downto
c_rtu_num_ports
)
<=
(
others
=>
'0'
);
with
s_port_id_vector
select
with
s_port_id_vector
select
s_port_number_tmp
<=
x"00"
when
"00000000000000000000000000000000"
,
-- should not ther be 1?
s_port_number_tmp
<=
x"00"
when
"00000000000000000000000000000000"
,
-- should not ther be 1?
x"01"
when
"00000000000000000000000000000010"
,
x"01"
when
"00000000000000000000000000000010"
,
x"02"
when
"00000000000000000000000000000100"
,
x"02"
when
"00000000000000000000000000000100"
,
x"03"
when
"00000000000000000000000000001000"
,
x"03"
when
"00000000000000000000000000001000"
,
...
@@ -1268,7 +1263,4 @@ begin
...
@@ -1268,7 +1263,4 @@ begin
c_wrsw_num_ports
+
c_wrsw_num_ports
+
c_wrsw_prio_width
)
<=
s_rsp_drop
;
c_wrsw_prio_width
)
<=
s_rsp_drop
;
s_agr_hcam_reg
<=
(
others
=>
'0'
);
rtu_agr_hcam_o
<=
s_agr_hcam_reg
;
-- x"F0123456";
end
architecture
;
--wrsw_rtu_match
end
architecture
;
--wrsw_rtu_match
modules/wrsw_rtu/wrsw_rtu_private_pkg.vhd
View file @
64ec2aca
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment