Modifed constrains for WRS low jitter daughterboard

d849cd87 · Mattia Rizzi · db8d013c · d849cd87 · d849cd87
Commit d849cd87 authored Dec 20, 2016 by Mattia Rizzi
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scb_top_synthesis.ucf top/scb_18ports/scb_top_synthesis.ucf +1349 -1268

scb_top_synthesis.ucf top/scb_8ports/scb_top_synthesis.ucf +616 -280

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--- a/top/scb_18ports/scb_top_synthesis.ucf
+++ b/top/scb_18ports/scb_top_synthesis.ucf
--- a/top/scb_8ports/scb_top_synthesis.ucf
+++ b/top/scb_8ports/scb_top_synthesis.ucf